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authorYanhong Wang <yanhong.wang@starfivetech.com>2023-06-15 17:36:45 +0800
committerLeo Yu-Chi Liang <ycliang@andestech.com>2023-07-12 13:21:40 +0800
commit9b7060bd15e7265179772d9a350a8652e58f0e40 (patch)
tree23f18dc6f239732c4f9a16759fc67947d5fec871 /arch/riscv/dts
parent55a2b826902255da95ae8b39f022ec4b0941753c (diff)
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riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
The difference between 1.2A and 1.3B is dynamically configured according to the PCB version, and there is no difference on the board device tree, so the same DT file can be used. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv/dts')
-rw-r--r--arch/riscv/dts/Makefile3
-rw-r--r--arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi (renamed from arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi)25
-rw-r--r--arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts12
-rw-r--r--arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi69
-rw-r--r--arch/riscv/dts/jh7110-starfive-visionfive-2.dts (renamed from arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts)3
5 files changed, 26 insertions, 86 deletions
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 1d61eb8..d9c050e 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -7,8 +7,7 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
-dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.3b.dtb
-dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.2a.dtb
+dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
include $(srctree)/scripts/Makefile.dts
targets += $(dtb-y)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 3c322c5..2afcec3 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
*/
#include "binman.dtsi"
@@ -67,3 +67,26 @@
};
};
+&binman {
+ itb {
+ fit {
+ images {
+ fdt-1 {
+ description = "NAME";
+ load = <0x40400000>;
+ compression = "none";
+
+ uboot_fdt_blob: blob-ext {
+ filename = "u-boot.dtb";
+ };
+ };
+ };
+
+ configurations {
+ conf-1 {
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
deleted file mode 100644
index b9d26d7..0000000
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
- */
-
-/dts-v1/;
-#include "jh7110-starfive-visionfive-2.dtsi"
-
-/ {
- model = "StarFive VisionFive 2 v1.2A";
- compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
-};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
deleted file mode 100644
index 3c322c5..0000000
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
+++ /dev/null
@@ -1,69 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
- */
-
-#include "binman.dtsi"
-#include "jh7110-u-boot.dtsi"
-/ {
- chosen {
- bootph-pre-ram;
- };
-
- firmware {
- spi0 = &qspi;
- bootph-pre-ram;
- };
-
- config {
- bootph-pre-ram;
- u-boot,spl-payload-offset = <0x100000>;
- };
-
- memory@40000000 {
- bootph-pre-ram;
- };
-};
-
-&uart0 {
- bootph-pre-ram;
-};
-
-&mmc0 {
- bootph-pre-ram;
-};
-
-&mmc1 {
- bootph-pre-ram;
-};
-
-&qspi {
- bootph-pre-ram;
-
- nor-flash@0 {
- bootph-pre-ram;
- };
-};
-
-&sysgpio {
- bootph-pre-ram;
-};
-
-&mmc0_pins {
- bootph-pre-ram;
- mmc0-pins-rest {
- bootph-pre-ram;
- };
-};
-
-&mmc1_pins {
- bootph-pre-ram;
- mmc1-pins0 {
- bootph-pre-ram;
- };
-
- mmc1-pins1 {
- bootph-pre-ram;
- };
-};
-
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2.dts
index 3b3b345..288ea39 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dts
@@ -1,12 +1,11 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
*/
/dts-v1/;
#include "jh7110-starfive-visionfive-2.dtsi"
/ {
- model = "StarFive VisionFive 2 v1.3B";
compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
};