From 9b7060bd15e7265179772d9a350a8652e58f0e40 Mon Sep 17 00:00:00 2001 From: Yanhong Wang Date: Thu, 15 Jun 2023 17:36:45 +0800 Subject: riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B The difference between 1.2A and 1.3B is dynamically configured according to the PCB version, and there is no difference on the board device tree, so the same DT file can be used. Signed-off-by: Yanhong Wang Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/Makefile | 3 +- .../dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 92 ++++++++++++++++++++++ .../jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69 ---------------- .../dts/jh7110-starfive-visionfive-2-v1.2a.dts | 12 --- .../jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi | 69 ---------------- .../dts/jh7110-starfive-visionfive-2-v1.3b.dts | 12 --- arch/riscv/dts/jh7110-starfive-visionfive-2.dts | 11 +++ 7 files changed, 104 insertions(+), 164 deletions(-) create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2.dts (limited to 'arch/riscv/dts') diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 1d61eb8..d9c050e 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -7,8 +7,7 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb -dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.3b.dtb -dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.2a.dtb +dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb include $(srctree)/scripts/Makefile.dts targets += $(dtb-y) diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi new file mode 100644 index 0000000..2afcec3 --- /dev/null +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ + +#include "binman.dtsi" +#include "jh7110-u-boot.dtsi" +/ { + chosen { + bootph-pre-ram; + }; + + firmware { + spi0 = &qspi; + bootph-pre-ram; + }; + + config { + bootph-pre-ram; + u-boot,spl-payload-offset = <0x100000>; + }; + + memory@40000000 { + bootph-pre-ram; + }; +}; + +&uart0 { + bootph-pre-ram; +}; + +&mmc0 { + bootph-pre-ram; +}; + +&mmc1 { + bootph-pre-ram; +}; + +&qspi { + bootph-pre-ram; + + nor-flash@0 { + bootph-pre-ram; + }; +}; + +&sysgpio { + bootph-pre-ram; +}; + +&mmc0_pins { + bootph-pre-ram; + mmc0-pins-rest { + bootph-pre-ram; + }; +}; + +&mmc1_pins { + bootph-pre-ram; + mmc1-pins0 { + bootph-pre-ram; + }; + + mmc1-pins1 { + bootph-pre-ram; + }; +}; + +&binman { + itb { + fit { + images { + fdt-1 { + description = "NAME"; + load = <0x40400000>; + compression = "none"; + + uboot_fdt_blob: blob-ext { + filename = "u-boot.dtb"; + }; + }; + }; + + configurations { + conf-1 { + fdt = "fdt-1"; + }; + }; + }; + }; +}; diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi deleted file mode 100644 index 3c322c5..0000000 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi +++ /dev/null @@ -1,69 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright (C) 2022 StarFive Technology Co., Ltd. - */ - -#include "binman.dtsi" -#include "jh7110-u-boot.dtsi" -/ { - chosen { - bootph-pre-ram; - }; - - firmware { - spi0 = &qspi; - bootph-pre-ram; - }; - - config { - bootph-pre-ram; - u-boot,spl-payload-offset = <0x100000>; - }; - - memory@40000000 { - bootph-pre-ram; - }; -}; - -&uart0 { - bootph-pre-ram; -}; - -&mmc0 { - bootph-pre-ram; -}; - -&mmc1 { - bootph-pre-ram; -}; - -&qspi { - bootph-pre-ram; - - nor-flash@0 { - bootph-pre-ram; - }; -}; - -&sysgpio { - bootph-pre-ram; -}; - -&mmc0_pins { - bootph-pre-ram; - mmc0-pins-rest { - bootph-pre-ram; - }; -}; - -&mmc1_pins { - bootph-pre-ram; - mmc1-pins0 { - bootph-pre-ram; - }; - - mmc1-pins1 { - bootph-pre-ram; - }; -}; - diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts deleted file mode 100644 index b9d26d7..0000000 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts +++ /dev/null @@ -1,12 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright (C) 2022 StarFive Technology Co., Ltd. - */ - -/dts-v1/; -#include "jh7110-starfive-visionfive-2.dtsi" - -/ { - model = "StarFive VisionFive 2 v1.2A"; - compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110"; -}; diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi deleted file mode 100644 index 3c322c5..0000000 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi +++ /dev/null @@ -1,69 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright (C) 2022 StarFive Technology Co., Ltd. - */ - -#include "binman.dtsi" -#include "jh7110-u-boot.dtsi" -/ { - chosen { - bootph-pre-ram; - }; - - firmware { - spi0 = &qspi; - bootph-pre-ram; - }; - - config { - bootph-pre-ram; - u-boot,spl-payload-offset = <0x100000>; - }; - - memory@40000000 { - bootph-pre-ram; - }; -}; - -&uart0 { - bootph-pre-ram; -}; - -&mmc0 { - bootph-pre-ram; -}; - -&mmc1 { - bootph-pre-ram; -}; - -&qspi { - bootph-pre-ram; - - nor-flash@0 { - bootph-pre-ram; - }; -}; - -&sysgpio { - bootph-pre-ram; -}; - -&mmc0_pins { - bootph-pre-ram; - mmc0-pins-rest { - bootph-pre-ram; - }; -}; - -&mmc1_pins { - bootph-pre-ram; - mmc1-pins0 { - bootph-pre-ram; - }; - - mmc1-pins1 { - bootph-pre-ram; - }; -}; - diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts deleted file mode 100644 index 3b3b345..0000000 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts +++ /dev/null @@ -1,12 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright (C) 2022 StarFive Technology Co., Ltd. - */ - -/dts-v1/; -#include "jh7110-starfive-visionfive-2.dtsi" - -/ { - model = "StarFive VisionFive 2 v1.3B"; - compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; -}; diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2.dts new file mode 100644 index 0000000..288ea39 --- /dev/null +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ + +/dts-v1/; +#include "jh7110-starfive-visionfive-2.dtsi" + +/ { + compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; +}; -- cgit v1.1