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| author | Sean Anderson <seanga2@gmail.com> | 2020-10-16 18:57:50 -0400 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2020-12-18 16:16:37 +0530 |
| commit | 237e5880f8778ef2d26d029f53b57df56a72db4e (patch) | |
| tree | b6d716a0255591c19c5b59b80df55c156dd983d4 /arch/mips | |
| parent | ddd3450f399051478263e823f5f778745824bdb3 (diff) | |
| download | u-boot-237e5880f8778ef2d26d029f53b57df56a72db4e.zip u-boot-237e5880f8778ef2d26d029f53b57df56a72db4e.tar.gz u-boot-237e5880f8778ef2d26d029f53b57df56a72db4e.tar.bz2 | |
spi: dw: Add SoC-specific compatible strings
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.
Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/dts/mscc,jr2.dtsi | 2 | ||||
| -rw-r--r-- | arch/mips/dts/mscc,ocelot.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/dts/mscc,jr2.dtsi b/arch/mips/dts/mscc,jr2.dtsi index 7f5a96f..c44e9a2 100644 --- a/arch/mips/dts/mscc,jr2.dtsi +++ b/arch/mips/dts/mscc,jr2.dtsi @@ -94,7 +94,7 @@ spi0: spi-master@101000 { #address-cells = <1>; #size-cells = <0>; - compatible = "snps,dw-apb-ssi"; + compatible = "mscc,jaguar2-spi", "snps,dw-apb-ssi"; reg = <0x101000 0x40>; num-chipselect = <4>; bus-num = <0>; diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi index 9a187b6..aeb4bf8 100644 --- a/arch/mips/dts/mscc,ocelot.dtsi +++ b/arch/mips/dts/mscc,ocelot.dtsi @@ -100,7 +100,7 @@ spi0: spi-master@101000 { #address-cells = <1>; #size-cells = <0>; - compatible = "snps,dw-apb-ssi"; + compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi"; reg = <0x101000 0x40>; num-chipselect = <4>; bus-num = <0>; |