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| author | Horatiu Vultur <horatiu.vultur@microchip.com> | 2021-03-10 09:31:38 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2021-04-22 02:34:45 +0200 |
| commit | 6b59304602f2f954f22b96ec33e021591d1dc16f (patch) | |
| tree | ffd4179e18867c25764682c4b132442e7d8800f8 /arch/mips/dts | |
| parent | 842d049be23976ebcbb2522fa8d752d3aae8631a (diff) | |
| download | u-boot-6b59304602f2f954f22b96ec33e021591d1dc16f.zip u-boot-6b59304602f2f954f22b96ec33e021591d1dc16f.tar.gz u-boot-6b59304602f2f954f22b96ec33e021591d1dc16f.tar.bz2 | |
net: jr2: Reset switch
Make sure to reset the switch core at probe time.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Diffstat (limited to 'arch/mips/dts')
| -rw-r--r-- | arch/mips/dts/mscc,jr2.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/dts/mscc,jr2.dtsi b/arch/mips/dts/mscc,jr2.dtsi index c44e9a2..87db7ca 100644 --- a/arch/mips/dts/mscc,jr2.dtsi +++ b/arch/mips/dts/mscc,jr2.dtsi @@ -243,7 +243,9 @@ <0x017d0000 0x10000>, // QFWD <0x01020000 0x20000>, // QS <0x017e0000 0x10000>, // QSYS - <0x01b00000 0x80000>; // REW + <0x01b00000 0x80000>, // REW + <0x01010000 0x100>, // GCB + <0x00000000 0x100>; // ICPU reg-names = "port0", "port1", "port2", "port3", "port4", "port5", "port6", "port7", "port8", "port9", "port10", "port11", "port12", "port13", @@ -257,7 +259,7 @@ "port42", "port43", "port44", "port45", "port46", "port47", "ana_ac", "ana_cl", "ana_l2", "asm", "hsio", "lrn", "qfwd", - "qs", "qsys", "rew"; + "qs", "qsys", "rew", "gcb", "icpu"; status = "okay"; ethernet-ports { |