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| author | Jonas Karlman <jonas@kwiboo.se> | 2023-07-28 11:38:37 +0000 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2023-07-31 17:34:43 +0800 |
| commit | 263f81d3a509e09289c3eba2f7cd0b49eb9f5145 (patch) | |
| tree | 4b340b0f677f6d71fe91ac44eb05602f211803b7 /arch/arm | |
| parent | cc11d5c4ba27271de615497bdf2785fe3620e30d (diff) | |
| download | u-boot-263f81d3a509e09289c3eba2f7cd0b49eb9f5145.zip u-boot-263f81d3a509e09289c3eba2f7cd0b49eb9f5145.tar.gz u-boot-263f81d3a509e09289c3eba2f7cd0b49eb9f5145.tar.bz2 | |
rockchip: rk3399-pinephone-pro: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi index 347243f..cabf0a9 100644 --- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi @@ -10,10 +10,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; }; - - config { - u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ - }; }; &rng { |