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| author | Icenowy Zheng <uwu@icenowy.me> | 2022-10-13 21:26:44 +0800 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2022-10-19 14:15:02 +0100 |
| commit | 9a916b07fed3fd801042f7425afd1ed02dd282ad (patch) | |
| tree | b877af973e03330f0bf811085848ebd47e0f68c9 /arch/arm/mach-sunxi | |
| parent | a514577ce2dc1a5fdb1c5d1515e113d3b2cd24f9 (diff) | |
| download | u-boot-9a916b07fed3fd801042f7425afd1ed02dd282ad.zip u-boot-9a916b07fed3fd801042f7425afd1ed02dd282ad.tar.gz u-boot-9a916b07fed3fd801042f7425afd1ed02dd282ad.tar.bz2 | |
sunxi: fix SUNIV build when enabling D-Cache
The enable_caches function in architecture-specific board code is only
necessary for V7A CPUs, code for both V8A and ARM926 have already
declared this function.
Only provide our implementation of enable_caches() for V7A CPUs.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
| -rw-r--r-- | arch/arm/mach-sunxi/board.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 62bb40b..60ccf90 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -488,7 +488,7 @@ void reset_cpu(void) } #endif -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && defined(CONFIG_CPU_V7A) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ |