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author | Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> | 2019-05-13 21:16:44 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2019-05-14 19:52:39 +0200 |
commit | 48ec73453ae909230585188191d0cace646a2b17 (patch) | |
tree | ff5b1b4f9258c7ffb0b43b859e8f7c4a0596d0c7 /arch/arm/mach-socfpga | |
parent | 430b42f76a4e50ffef7cc2b3c195ff645a438433 (diff) | |
download | u-boot-48ec73453ae909230585188191d0cace646a2b17.zip u-boot-48ec73453ae909230585188191d0cace646a2b17.tar.gz u-boot-48ec73453ae909230585188191d0cace646a2b17.tar.bz2 |
arm: sofcpga: s10: remove unused ad-hoc reset code
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r-- | arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/reset_manager_s10.c | 11 |
2 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h index b93bbaf..452147b 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h @@ -8,7 +8,6 @@ #define _RESET_MANAGER_S10_ void reset_cpu(ulong addr); -void reset_deassert_peripherals_handoff(void); int cpu_has_been_warmreset(void); void socfpga_bridges_reset(int enable); diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index 39753a1..499a84a 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -95,17 +95,6 @@ void socfpga_bridges_reset(int enable) } /* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per1modrst); - /* Enable OCP first */ - writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst); - writel(0, &reset_manager_base->per0modrst); -} - -/* * Return non-zero if the CPU has been warm reset */ int cpu_has_been_warmreset(void) |