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author | Simon Glass <sjg@chromium.org> | 2023-02-05 17:54:59 -0700 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2023-02-10 07:41:41 -0500 |
commit | ce119a27064ed1648fe9bcbf2832c4f75a162230 (patch) | |
tree | 6eed1a990fc8932e92b80bf90ff8ba030dece76d /arch/arm/mach-rockchip/misc.c | |
parent | ba490b251c945bc182744c2ab8f942334f3cd588 (diff) | |
download | u-boot-ce119a27064ed1648fe9bcbf2832c4f75a162230.zip u-boot-ce119a27064ed1648fe9bcbf2832c4f75a162230.tar.gz u-boot-ce119a27064ed1648fe9bcbf2832c4f75a162230.tar.bz2 |
Correct SPL uses of ROCKCHIP_OTP
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ROCKCHIP_OTP defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-rockchip/misc.c')
-rw-r--r-- | arch/arm/mach-rockchip/misc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c index 437c7cf..b350f18 100644 --- a/arch/arm/mach-rockchip/misc.c +++ b/arch/arm/mach-rockchip/misc.c @@ -60,7 +60,7 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset, const u32 cpuid_length, u8 *cpuid) { -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP) +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP) struct udevice *dev; int ret; @@ -68,7 +68,7 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset, #if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_efuse), &dev); -#elif CONFIG_IS_ENABLED(ROCKCHIP_OTP) +#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); #endif |