ARM: renesas: Rename arch-/mach-rmobile to arch-/mach-renesas

Rename arch-rmobile to arch-renesas and mach-rmobile to mach-renesas
because all the chips are made by Renesas, while only a subset of
them is from the R-Mobile line.

Use the following command to perform the rename, with manual move of
the directories using git mv and manual fix up to arch/arm/Makefile:

"
$ git grep -l '\<\(arch\|mach\)-rmobile\>' | \
  xargs -I {} sed -i 's@\<\(arch\|mach\)-rmobile\>@\1-renesas@g' {}
$ sed -i 's@rmobile@renesas@' board/*/*/Kconfig
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>

1 files changed, 0 insertions, 103 deletions

diff --git a/arch/arm/mach-rmobile/lowlevel_init_gen3.S b/arch/arm/mach-rmobile/lowlevel_init_gen3.S
deleted file mode 100644
index 0d77800..0000000
--- a/arch/arm/mach-rmobile/lowlevel_init_gen3.S
+++ /dev/null
@@ -1,103 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * arch/arm/cpu/armv8/rcar_gen3/lowlevel_init.S
- *	This file is lowlevel initialize routine.
- *
- * (C) Copyright 2015 Renesas Electronics Corporation
- *
- * This file is based on the arch/arm/cpu/armv8/start.S
- *
- * (C) Copyright 2013
- * David Feng <fenghua@phytium.com.cn>
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <linux/linkage.h>
-#include <asm/macro.h>
-
-.align 8
-.globl	rcar_atf_boot_args
-rcar_atf_boot_args:
-	.dword 0
-	.dword 0
-	.dword 0
-	.dword 0
-
-ENTRY(save_boot_params)
-	adr	x8, rcar_atf_boot_args
-	stp	x0, x1, [x8], #16
-	stp	x2, x3, [x8], #16
-	b	save_boot_params_ret
-ENDPROC(save_boot_params)
-
-.pushsection .text.s_init, "ax"
-WEAK(s_init)
-	ret
-ENDPROC(s_init)
-.popsection
-
-ENTRY(lowlevel_init)
-	mov	x29, lr			/* Save LR */
-
-#ifndef CONFIG_ARMV8_MULTIENTRY
-	/*
-	 * For single-entry systems the lowlevel init is very simple.
-	 */
-	ldr	x0, =GICD_BASE
-	bl	gic_init_secure
-
-#else /* CONFIG_ARMV8_MULTIENTRY is set */
-
-#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
-	branch_if_slave x0, 1f
-	ldr	x0, =GICD_BASE
-	bl	gic_init_secure
-1:
-#if defined(CONFIG_GICV3)
-	ldr	x0, =GICR_BASE
-	bl	gic_init_secure_percpu
-#elif defined(CONFIG_GICV2)
-	ldr	x0, =GICD_BASE
-	ldr	x1, =GICC_BASE
-	bl	gic_init_secure_percpu
-#endif
-#endif
-
-	branch_if_master x0, 2f
-
-	/*
-	 * Slave should wait for master clearing spin table.
-	 * This sync prevent salves observing incorrect
-	 * value of spin table and jumping to wrong place.
-	 */
-#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
-#ifdef CONFIG_GICV2
-	ldr	x0, =GICC_BASE
-#endif
-	bl	gic_wait_for_interrupt
-#endif
-
-	/*
-	 * All slaves will enter EL2 and optionally EL1.
-	 */
-	adr	x4, lowlevel_in_el2
-	ldr	x5, =ES_TO_AARCH64
-	bl	armv8_switch_to_el2
-
-lowlevel_in_el2:
-#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
-	adr	x4, lowlevel_in_el1
-	ldr	x5, =ES_TO_AARCH64
-	bl	armv8_switch_to_el1
-
-lowlevel_in_el1:
-#endif
-#endif /* CONFIG_ARMV8_MULTIENTRY */
-
-	bl      s_init
-
-2:
-	mov	lr, x29			/* Restore LR */
-	ret
-ENDPROC(lowlevel_init)