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| author | Keerthy <j-keerthy@ti.com> | 2021-04-23 11:27:39 -0500 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-05-12 16:27:57 +0530 |
| commit | 7fe7713c2ec6c7018ef1a2d92f2439156a4b12bc (patch) | |
| tree | 379343be7ac346239cbab359dcdd82ae5a23195b /arch/arm/mach-k3 | |
| parent | 078332cee36fcb6562d2ef61913861b0a0f06b56 (diff) | |
| download | u-boot-7fe7713c2ec6c7018ef1a2d92f2439156a4b12bc.zip u-boot-7fe7713c2ec6c7018ef1a2d92f2439156a4b12bc.tar.gz u-boot-7fe7713c2ec6c7018ef1a2d92f2439156a4b12bc.tar.bz2 | |
armv8: mach-k3: am642: Add custom MMU support
Change the memory attributes for the DDR regions used by the remote
processors on AM65x so that the cores can see and execute the proper code.
A separate table based on the previous K3 SoCs is introduced since the
number of remote processors and their DDR usage is different between the
SoC families.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'arch/arm/mach-k3')
| -rw-r--r-- | arch/arm/mach-k3/arm64-mmu.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index a0da3df..94242e1 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -180,3 +180,44 @@ struct mm_region *mem_map = j7200_mem_map; #endif /* CONFIG_TARGET_J7200_A72_EVM */ #endif /* CONFIG_SOC_K3_J721E */ + +#ifdef CONFIG_SOC_K3_AM642 +/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ +#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3) + +/* ToDo: Add 64bit IO */ +struct mm_region am64_mem_map[NR_MMU_REGIONS] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x880000000UL, + .phys = 0x880000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x500000000UL, + .phys = 0x500000000UL, + .size = 0x400000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = am64_mem_map; +#endif /* CONFIG_SOC_K3_AM642 */ |