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authorSumit Garg <sumit.garg@linaro.org>2022-07-27 13:52:04 +0530
committerTom Rini <trini@konsulko.com>2022-08-26 10:55:46 -0400
commit0ddabb6830e5aee2c54f86f2430ea0f28f7538c3 (patch)
tree1db13f57a1832e79fad829844558ed728b41d1b9 /arch/arm/mach-ipq40xx
parenta4b99582bbe12c2fe7586ceaf443d99b3a38e389 (diff)
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arm: dts: qcom: Sync pinctrl DT nodes with Linux bindings
Currently for all Qcom SoCs/boards there are separate compatibles for GPIO and pinctrl. But this is inconsistent with official (upstream) Linux bindings which requires only a single compatible "qcom,<SoC name>-pinctrl" and there is no such compatible property as "qcom,tlmm-<SoC name>". So fix this inconsistency for Qcom SoCs in order to comply with upstream DT bindings. This is done via removing compatibles from "msm_gpio" driver and via binding to "msm_gpio" driver from pinctrl driver in case "gpio-controller" property is specified for pinctrl node. Suggested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Diffstat (limited to 'arch/arm/mach-ipq40xx')
-rw-r--r--arch/arm/mach-ipq40xx/pinctrl-snapdragon.c31
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
index c51a75e..036fec9 100644
--- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
+++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
@@ -14,6 +14,8 @@
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <dm/lists.h>
#include <dm/pinctrl.h>
#include <linux/bitops.h>
#include "pinctrl-snapdragon.h"
@@ -110,6 +112,32 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
return 0;
}
+static int msm_pinctrl_bind(struct udevice *dev)
+{
+ ofnode node = dev_ofnode(dev);
+ const char *name;
+ int ret;
+
+ ofnode_get_property(node, "gpio-controller", &ret);
+ if (ret < 0)
+ return 0;
+
+ /* Get the name of gpio node */
+ name = ofnode_get_name(node);
+ if (!name)
+ return -EINVAL;
+
+ /* Bind gpio node */
+ ret = device_bind_driver_to_node(dev, "gpio_msm",
+ name, node, NULL);
+ if (ret)
+ return ret;
+
+ dev_dbg(dev, "bind %s\n", name);
+
+ return 0;
+}
+
static struct pinctrl_ops msm_pinctrl_ops = {
.get_pins_count = msm_get_pins_count,
.get_pin_name = msm_get_pin_name,
@@ -123,7 +151,7 @@ static struct pinctrl_ops msm_pinctrl_ops = {
};
static const struct udevice_id msm_pinctrl_ids[] = {
- { .compatible = "qcom,tlmm-ipq4019", .data = (ulong)&ipq4019_data },
+ { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data },
{ }
};
@@ -134,4 +162,5 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = {
.priv_auto = sizeof(struct msm_pinctrl_priv),
.ops = &msm_pinctrl_ops,
.probe = msm_pinctrl_probe,
+ .bind = msm_pinctrl_bind,
};