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author | Marek Vasut <marex@denx.de> | 2023-03-06 15:53:51 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2023-03-30 13:47:04 +0200 |
commit | 4bdc3524d76eb9bc6e30b74f3dfe4a0ae5e5b1b6 (patch) | |
tree | 4726fa1c5d051817d3ad833e284d2e8c76e191f5 /arch/arm/include | |
parent | 80a34e4008f022a78409657d2b0a5020a472db2e (diff) | |
download | u-boot-4bdc3524d76eb9bc6e30b74f3dfe4a0ae5e5b1b6.zip u-boot-4bdc3524d76eb9bc6e30b74f3dfe4a0ae5e5b1b6.tar.gz u-boot-4bdc3524d76eb9bc6e30b74f3dfe4a0ae5e5b1b6.tar.bz2 |
net: fec_mxc: Add board_interface_eth_init() for i.MX8M Mini/Nano/Plus
Implement common board_interface_eth_init() and call it from the FEC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Mini/Nano/Plus FEC and supersedes the current board-side
configuration of the same IOMUX GPR[1] duplicated in the board files.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 1818b45..6e2fc82 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -89,6 +89,7 @@ #define DDRC_IPS_BASE_ADDR(X) (0x3d400000 + ((X) * 0x2000000)) #define DDR_CSD1_BASE_ADDR 0x40000000 +#define IOMUXC_GPR_GPR1_GPR_ENET1_RGMII_EN BIT(22) #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_RGMII_EN BIT(21) #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_TX_CLK_SEL BIT(20) #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_CLK_GEN_EN BIT(19) @@ -96,6 +97,7 @@ #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MII (0 << 16) #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RGMII (1 << 16) #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_RMII (4 << 16) +#define IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL BIT(13) #define FEC_QUIRK_ENET_MAC #ifdef CONFIG_ARMV8_PSCI /* Final jump location */ |