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author | Ovidiu Panait <ovpanait@gmail.com> | 2020-03-29 20:57:40 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2020-04-24 15:17:14 -0400 |
commit | 6184858b859f6fcea4b23f76cfb7988882a3c8a7 (patch) | |
tree | 011ee92b2d1c7bdea474824ef1c7d838717c421b /arch/arm/include/asm/cache.h | |
parent | 586b15bce82a2161dbe71991c14c8c36f5683033 (diff) | |
download | u-boot-6184858b859f6fcea4b23f76cfb7988882a3c8a7.zip u-boot-6184858b859f6fcea4b23f76cfb7988882a3c8a7.tar.gz u-boot-6184858b859f6fcea4b23f76cfb7988882a3c8a7.tar.bz2 |
arm: asm/cache.c: Introduce arm_reserve_mmu
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.
Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm/cache.h')
-rw-r--r-- | arch/arm/include/asm/cache.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 950ec1e..c20e05e 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank); */ #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +/* + * arm_reserve_mmu() - Reserve memory for MMU TLB table + * + * Default implementation for reserving memory for MMU TLB table. It is used + * during generic board init sequence in common/board_f.c. Weakly defined, so + * that machines can override it if needed. + * + * Return: 0 if OK + */ +int arm_reserve_mmu(void); + #endif /* _ASM_CACHE_H */ |