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| author | Chia-Wei Wang <chiawei_wang@aspeedtech.com> | 2021-10-27 14:17:29 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-11-17 17:05:00 -0500 |
| commit | af6451187c2b93a05a03ca6e9f4f33cabf6da04a (patch) | |
| tree | 6ab6b63ce8cd33e485bcc40f8c49000fa915e9ec /arch/arm/include/asm/arch-aspeed | |
| parent | a2f16d0073341bdc81d592a84ae93f3266e57d42 (diff) | |
| download | u-boot-af6451187c2b93a05a03ca6e9f4f33cabf6da04a.zip u-boot-af6451187c2b93a05a03ca6e9f4f33cabf6da04a.tar.gz u-boot-af6451187c2b93a05a03ca6e9f4f33cabf6da04a.tar.bz2 | |
clk: ast2600: Add RSACLK control for ACRY
Add RSACLK enable for ACRY, the HW RSA/ECC crypto engine
of ASPEED AST2600 SoCs.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Diffstat (limited to 'arch/arm/include/asm/arch-aspeed')
| -rw-r--r-- | arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index d7b500f..7c5aab9 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -8,6 +8,7 @@ #define SCU_UNLOCK_KEY 0x1688a8a8 #define SCU_CLKGATE1_EMMC BIT(27) +#define SCU_CLKGATE1_ACRY BIT(24) #define SCU_CLKGATE1_MAC2 BIT(21) #define SCU_CLKGATE1_MAC1 BIT(20) #define SCU_CLKGATE1_USB_HUB BIT(14) |