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author | Chia-Wei Wang <chiawei_wang@aspeedtech.com> | 2022-06-01 16:43:52 +0800 |
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committer | Tom Rini <trini@konsulko.com> | 2022-06-22 21:30:05 -0400 |
commit | 12770d0df0e841cfa1bdbde7636aad3d531bf66b (patch) | |
tree | 363b6e9aa64f183b669ea0e30a2178aab4d3182e /arch/arm/include/asm/arch-aspeed | |
parent | 442a69c143759648f571e3784c7b3bc5be7ed595 (diff) | |
download | u-boot-12770d0df0e841cfa1bdbde7636aad3d531bf66b.zip u-boot-12770d0df0e841cfa1bdbde7636aad3d531bf66b.tar.gz u-boot-12770d0df0e841cfa1bdbde7636aad3d531bf66b.tar.bz2 |
ast2600: spl: Add boot mode detection
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Diffstat (limited to 'arch/arm/include/asm/arch-aspeed')
-rw-r--r-- | arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index 7c5aab9..251bfa2 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -87,6 +87,9 @@ #define SCU_HWSTRAP1_CPU_FREQ_SHIFT 8 #define SCU_HWSTRAP1_MAC2_INTF BIT(7) #define SCU_HWSTRAP1_MAC1_INTF BIT(6) +#define SCU_HWSTRAP1_BOOT_EMMC BIT(2) + +#define SCU_HWSTRAP2_BOOT_UART BIT(8) #define SCU_EFUSE_DIS_DP BIT(17) #define SCU_EFUSE_DIS_VGA BIT(14) |