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authorStefan Roese <sr@denx.de>2017-04-24 18:45:27 +0300
committerStefan Roese <sr@denx.de>2017-05-09 13:38:18 +0200
commitfdc9e88088a774c6de0382f5a05a32dd8684b0bb (patch)
treed45602a013d6f0b43a715177fcb2346da17dc5b8 /arch/arm/dts
parentc01f9fe858d25fc5d8a74844ed8c180356204b78 (diff)
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fix: phy: marvell: cp110: update comphy selector option
Align PHY selectors register with Armada-CP-110 functional SPEC update all relevant device trees with this change. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/armada-7040-db.dts2
-rw-r--r--arch/arm/dts/armada-8040-mcbin.dts4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts
index c1a0f46..b140b34 100644
--- a/arch/arm/dts/armada-7040-db.dts
+++ b/arch/arm/dts/armada-7040-db.dts
@@ -159,7 +159,7 @@
&cpm_comphy {
phy0 {
- phy-type = <PHY_TYPE_SGMII2>;
+ phy-type = <PHY_TYPE_SGMII1>;
phy-speed = <PHY_SPEED_1_25G>;
};
diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts
index dde495a..991ddc0 100644
--- a/arch/arm/dts/armada-8040-mcbin.dts
+++ b/arch/arm/dts/armada-8040-mcbin.dts
@@ -264,7 +264,7 @@
&cps_comphy {
/*
* CP1 Serdes Configuration:
- * Lane 0: SGMII2
+ * Lane 0: SGMII1
* Lane 1: SATA 0
* Lane 2: USB HOST 0
* Lane 3: SATA1
@@ -272,7 +272,7 @@
* Lane 5: SGMII3
*/
phy0 {
- phy-type = <PHY_TYPE_SGMII2>;
+ phy-type = <PHY_TYPE_SGMII1>;
phy-speed = <PHY_SPEED_1_25G>;
};
phy1 {