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author | Tom Rini <trini@konsulko.com> | 2023-01-10 11:19:42 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2023-01-20 12:27:23 -0500 |
commit | a84fa1bef4382b30de0e8b57997075aabe6f583a (patch) | |
tree | 3c3b498463bb2acb07773e775618066865bd61b1 /arch/arm/cpu | |
parent | 89c90cadf371cafe06ce99b80c0334043fabf5cd (diff) | |
download | u-boot-a84fa1bef4382b30de0e8b57997075aabe6f583a.zip u-boot-a84fa1bef4382b30de0e8b57997075aabe6f583a.tar.gz u-boot-a84fa1bef4382b30de0e8b57997075aabe6f583a.tar.bz2 |
nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Kconfig | 9 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 9 |
2 files changed, 0 insertions, 18 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 64fea9a..0edcf4c 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -93,15 +93,6 @@ config SYS_FSL_ERRATUM_A010315 config SYS_FSL_HAS_CCI400 bool -config SYS_FSL_SRDS_1 - bool - -config SYS_FSL_SRDS_2 - bool - -config SYS_HAS_SERDES - bool - config SYS_FSL_ERRATUM_A008407 bool diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index dcb1ca5..a8b493e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -567,18 +567,9 @@ config SYS_DP_DDR_BASE_PHY DDR controller uses this value as the base address for binding. It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access. -config SYS_FSL_SRDS_1 - bool - -config SYS_FSL_SRDS_2 - bool - config SYS_NXP_SRDS_3 bool -config SYS_HAS_SERDES - bool - config FSL_TZASC_1 bool |