aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/cpu/arm926ejs
diff options
context:
space:
mode:
authorAdam Ford <aford173@gmail.com>2018-08-16 13:23:11 -0500
committerTom Rini <trini@konsulko.com>2018-09-10 21:19:16 -0400
commit93b283d49f933f95f3a6f40762936f454ac655a8 (patch)
tree73100f23d055bae16636df9368a8d4558e459f3a /arch/arm/cpu/arm926ejs
parent5f133bb7c519ebb069f74bbda428627ad28419c6 (diff)
downloadu-boot-93b283d49f933f95f3a6f40762936f454ac655a8.zip
u-boot-93b283d49f933f95f3a6f40762936f454ac655a8.tar.gz
u-boot-93b283d49f933f95f3a6f40762936f454ac655a8.tar.bz2
ARM: CPU: arm926ejs: Consolidate cache routines to common file
Four different boards had different options for enabling cache that were virtually all the same. This consolidates these common functions into arch/arm/cpu/arm926ejs/cache.c This also has the positive side-effect of enabling cache on the Davinci (da850) boards. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Add mach-at91 to the list of consolidations] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
-rw-r--r--arch/arm/cpu/arm926ejs/cache.c23
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c8
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/generic.c8
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxs.c10
-rw-r--r--arch/arm/cpu/arm926ejs/spear/cpu.c10
5 files changed, 23 insertions, 36 deletions
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 3b89391..22a55f5 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -65,3 +65,26 @@ __weak void l2_cache_disable(void) {}
#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
__weak void invalidate_l2_cache(void) {}
#endif
+
+#ifndef CONFIG_SYS_ICACHE_OFF
+/* Invalidate entire I-cache and branch predictor array */
+void invalidate_icache_all(void)
+{
+ unsigned long i = 0;
+
+ asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
+}
+#else
+void invalidate_icache_all(void) {}
+#endif
+
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+ icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+ dcache_enable();
+#endif
+}
+
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index e6eef36..2795a5f 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -214,14 +214,6 @@ int print_cpuinfo(void)
}
#endif
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-#endif
-}
-
#if defined(CONFIG_FEC_MXC)
/*
* Initializes on-chip ethernet controllers.
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index a593283..08b1b4d 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -374,11 +374,3 @@ void mx27_sd2_init_pins(void)
}
#endif /* CONFIG_MMC_MXC */
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-#endif /* CONFIG_SYS_DCACHE_OFF */
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index f42f311..85c65dc 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -49,16 +49,6 @@ void reset_cpu(ulong ignored)
;
}
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_ICACHE_OFF
- icache_enable();
-#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
- dcache_enable();
-#endif
-}
-
/*
* This function will craft a jumptable at 0x0 which will redirect interrupt
* vectoring to proper location of U-Boot in RAM.
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c
index 0970aca..e852a88 100644
--- a/arch/arm/cpu/arm926ejs/spear/cpu.c
+++ b/arch/arm/cpu/arm926ejs/spear/cpu.c
@@ -55,16 +55,6 @@ int arch_cpu_init(void)
return 0;
}
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_ICACHE_OFF
- icache_enable();
-#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
- dcache_enable();
-#endif
-}
-
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)
{