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| author | Mans Rullgard <mans@mansr.com> | 2018-04-27 10:45:15 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-06-18 16:24:57 +0200 |
| commit | 29b921b86c233eca7427e8974be2a9c6888c4dfa (patch) | |
| tree | 25c50b22e05b4666118c65530f432c10c55f3dce /arch/arm/cpu/arm926ejs | |
| parent | c5437e5b8aff9c952ebaab9be7670439c141e4e7 (diff) | |
| download | u-boot-29b921b86c233eca7427e8974be2a9c6888c4dfa.zip u-boot-29b921b86c233eca7427e8974be2a9c6888c4dfa.tar.gz u-boot-29b921b86c233eca7427e8974be2a9c6888c4dfa.tar.bz2 | |
ARM: mxs: let boards override entire dram parameter table
If many values differ from the defaults, overriding the full table
is simpler and more space efficient than tweaking it through
mxs_adjust_memory_params().
Signed-off-by: Mans Rullgard <mans@mansr.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 8fef401..7818d72 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -15,7 +15,7 @@ #include "mxs_init.h" -static uint32_t dram_vals[] = { +__weak uint32_t mxs_dram_vals[] = { /* * i.MX28 DDR2 at 200MHz */ @@ -100,11 +100,11 @@ static void initialize_dram_values(void) int i; debug("SPL: Setting mx28 board specific SDRAM parameters\n"); - mxs_adjust_memory_params(dram_vals); + mxs_adjust_memory_params(mxs_dram_vals); debug("SPL: Applying SDRAM parameters\n"); - for (i = 0; i < ARRAY_SIZE(dram_vals); i++) - writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) + writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); } #else static void initialize_dram_values(void) @@ -112,7 +112,7 @@ static void initialize_dram_values(void) int i; debug("SPL: Setting mx23 board specific SDRAM parameters\n"); - mxs_adjust_memory_params(dram_vals); + mxs_adjust_memory_params(mxs_dram_vals); /* * HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as @@ -124,10 +124,10 @@ static void initialize_dram_values(void) * So skip the initialization of these HW_DRAM_CTL registers. */ debug("SPL: Applying SDRAM parameters\n"); - for (i = 0; i < ARRAY_SIZE(dram_vals); i++) { + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) { if (i == 8 || i == 27 || i == 28 || i == 35) continue; - writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); + writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); } /* |