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author | Chen-Yu Tsai <wens@csie.org> | 2017-02-25 14:19:54 +0100 |
---|---|---|
committer | Jagan Teki <jagan@amarulasolutions.com> | 2017-04-07 11:23:46 +0530 |
commit | ffe47eb72c56333e4bdeba885183a545adb45f57 (patch) | |
tree | 21113fae015c5a6db4d571e0f48e1f512f873fd1 | |
parent | 8cab65bf9af698694235718f1cf68b1f59df6cd2 (diff) | |
download | u-boot-ffe47eb72c56333e4bdeba885183a545adb45f57.zip u-boot-ffe47eb72c56333e4bdeba885183a545adb45f57.tar.gz u-boot-ffe47eb72c56333e4bdeba885183a545adb45f57.tar.bz2 |
ARM: dts: sun9i: Add mmc1 pinmux setting
commit 56b0730157f70dc23d6caff9e7ceb8b377b96b9f upstream.
On the A80, mmc1 is available on pingroup G. Designs mostly use this
to connect to an SDIO WiFi chip.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
-rw-r--r-- | arch/arm/dts/sun9i-a80.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi index f68b324..92412b2 100644 --- a/arch/arm/dts/sun9i-a80.dtsi +++ b/arch/arm/dts/sun9i-a80.dtsi @@ -701,6 +701,14 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + mmc1_pins: mmc1 { + allwinner,pins = "PG0", "PG1" ,"PG2", "PG3", + "PG4", "PG5"; + allwinner,function = "mmc1"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc2_8bit_pins: mmc2_8bit { allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", |