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authorAmit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>2023-10-12 15:58:21 +0200
committerMichal Simek <michal.simek@amd.com>2023-11-07 13:47:09 +0100
commitfdff4b3c489d683ab08d6453ac91af593ab07a2a (patch)
tree16ff662a17e3e77cf0b8a6d805f5e85f44337243
parent03cc435539f447eb777032b034842ed5817f21a6 (diff)
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arm64: dts: zynqmp: make hw-ecc as the default ecc mode
Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the software stack supports software ecc engine. So, make hw-ecc as the default ecc mode. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
-rw-r--r--arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index 23a3ff2..160c6c5 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -141,8 +141,7 @@
reg = <0x0>;
#address-cells = <0x2>;
#size-cells = <0x1>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
+ nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-0";
nand-ecc-step-size = <1024>;
@@ -178,8 +177,7 @@
reg = <0x1>;
#address-cells = <0x2>;
#size-cells = <0x1>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
+ nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-1";
nand-ecc-step-size = <1024>;