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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-02-28 10:10:07 +0200 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2019-03-10 08:17:00 +0800 |
commit | d9b59fc9ae198785c1adce1462bd73ee56465d4e (patch) | |
tree | e179056d3a3ddf794b40ef738b6fb1440239351a | |
parent | ab83e5c1a27461ea57b184fc4bdac4d8d79deb91 (diff) | |
download | u-boot-d9b59fc9ae198785c1adce1462bd73ee56465d4e.zip u-boot-d9b59fc9ae198785c1adce1462bd73ee56465d4e.tar.gz u-boot-d9b59fc9ae198785c1adce1462bd73ee56465d4e.tar.bz2 |
x86: edison: Add the rest of UARTs present on board
Intel Edison has three UART ports, i.e.
port 0 - Bluetooth
port 1 - auxiliary, available for general purpose use
port 2 - debugging, usually console output is here
Enable all of them for future use.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r-- | arch/x86/dts/edison.dts | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index c3a7ae4..e8564bb 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -17,6 +17,8 @@ compatible = "intel,edison"; aliases { + serial0 = &serial0; + serial1 = &serial1; serial2 = &serial2; }; @@ -53,6 +55,22 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; + serial0: serial@ff010080 { + compatible = "intel,mid-uart"; + reg = <0xff010080 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + + serial1: serial@ff010100 { + compatible = "intel,mid-uart"; + reg = <0xff010100 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + serial2: serial@ff010180 { compatible = "intel,mid-uart"; reg = <0xff010180 0x100>; |