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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-06-15 21:09:28 +0200 |
|---|---|---|
| committer | Scott Wood <oss@buserror.net> | 2016-07-24 20:36:29 -0500 |
| commit | c1aa7d629eb9f0ed7836061170461abb04d34111 (patch) | |
| tree | a42678d8375fe4859e0d5779d2bdff3b5fa76ee3 | |
| parent | a0dfa88b4e12c00414a4058823e0eec8c216f1d7 (diff) | |
| download | u-boot-c1aa7d629eb9f0ed7836061170461abb04d34111.zip u-boot-c1aa7d629eb9f0ed7836061170461abb04d34111.tar.gz u-boot-c1aa7d629eb9f0ed7836061170461abb04d34111.tar.bz2 | |
sunxi: Enable NAND controller on the CHIP
Enable the NAND controller in the sun5i-r8-chip.dts.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
| -rw-r--r-- | arch/arm/dts/sun5i-a10s.dtsi | 14 | ||||
| -rw-r--r-- | arch/arm/dts/sun5i-a13-olinuxino.dts | 15 | ||||
| -rw-r--r-- | arch/arm/dts/sun5i-r8-chip.dts | 15 |
3 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi index bddd0de..a5f8855 100644 --- a/arch/arm/dts/sun5i-a10s.dtsi +++ b/arch/arm/dts/sun5i-a10s.dtsi @@ -241,6 +241,20 @@ allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + nand_cs2_pins_a: nand_cs@2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_cs3_pins_a: nand_cs@3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; &sram_a { diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts index b3c234c..30e069a 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino.dts @@ -155,6 +155,21 @@ status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + allwinner,randomize; + }; +}; + &ohci0 { status = "okay"; }; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index 6ad19e2..b1b62d5 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -142,6 +142,21 @@ status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + }; +}; + &ohci0 { status = "okay"; }; |