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author | Marek Vasut <marex@denx.de> | 2017-12-11 16:19:33 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2017-12-29 11:18:59 +0100 |
commit | a637fe6f27fd4c19ef9f43a5f871c244581422ac (patch) | |
tree | 1d7a6c187f944238d3e17319d4d669b5568d1b51 | |
parent | b6d86ce89f2c37e66cdd69c76959b22f8dce1d0f (diff) | |
download | u-boot-a637fe6f27fd4c19ef9f43a5f871c244581422ac.zip u-boot-a637fe6f27fd4c19ef9f43a5f871c244581422ac.tar.gz u-boot-a637fe6f27fd4c19ef9f43a5f871c244581422ac.tar.bz2 |
ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK
The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index bb98f39..57ae7f1 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -387,10 +387,6 @@ void board_init_f(ulong dummy) &dhcom6sdl_grp_ioregs); mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr); - /* Perform DDR DRAM calibration */ - udelay(100); - mmdc_do_dqs_calibration(&dhcom_ddr_info); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); |