aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorWasim Khan <wasim.khan@nxp.com>2020-02-14 11:04:34 +0530
committerPriyanka Jain <priyanka.jain@nxp.com>2020-03-30 08:06:51 +0530
commita4625d494bf5972746ea6bddcc2c72915fb7c815 (patch)
treed795d62babea45baf47d46869ed5f00b21cf1a9f
parent297d48857ac72c0ae303210e03e31b2e23bc7a93 (diff)
downloadu-boot-a4625d494bf5972746ea6bddcc2c72915fb7c815.zip
u-boot-a4625d494bf5972746ea6bddcc2c72915fb7c815.tar.gz
u-boot-a4625d494bf5972746ea6bddcc2c72915fb7c815.tar.bz2
board: fsl: lx2160a: Program GIC LPI configuration table
Program GIC LPI configuration table: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
-rw-r--r--board/freescale/lx2160a/lx2160a.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index cdacbbd..7ccd248 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -29,11 +29,14 @@
#include "../common/vid.h"
#include <fsl_immap.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
+#include <cpu_func.h>
#ifdef CONFIG_EMC2305
#include "../common/emc2305.h"
#endif
+#define GIC_LPI_SIZE 0x200000
#ifdef CONFIG_TARGET_LX2160AQDS
#define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value)
#define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f)
@@ -629,7 +632,6 @@ void board_quiesce_devices(void)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-
int ft_board_setup(void *blob, bd_t *bd)
{
int i;
@@ -640,6 +642,7 @@ int ft_board_setup(void *blob, bd_t *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
+ u64 gic_lpi_base;
ft_cpu_setup(blob, bd);
@@ -659,6 +662,11 @@ int ft_board_setup(void *blob, bd_t *bd)
size[i] = gd->bd->bi_dram[i].size;
}
+#ifdef CONFIG_GIC_V3_ITS
+ gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
+ gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
+#endif
+
#ifdef CONFIG_RESV_RAM
/* reduce size if reserved memory is within this bank */
if (gd->arch.resv_ram >= base[0] &&