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| author | Tom Rini <trini@konsulko.com> | 2021-01-12 15:46:52 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-13 07:32:02 -0500 |
| commit | 795f8fd0b591eef7cf3f8c6fcf9788280029cc4a (patch) | |
| tree | 71c2e050efcf18e76ce81f804f55f236df98cf68 | |
| parent | ee6726be4f0dccb612f0193c62ca149164c8a5af (diff) | |
| parent | 6bfa331a6e22507ae839fb8474ce1b3fd58808df (diff) | |
| download | u-boot-795f8fd0b591eef7cf3f8c6fcf9788280029cc4a.zip u-boot-795f8fd0b591eef7cf3f8c6fcf9788280029cc4a.tar.gz u-boot-795f8fd0b591eef7cf3f8c6fcf9788280029cc4a.tar.bz2 | |
Merge tag 'u-boot-amlogic-20210112' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- sync amlogic GX & AXG DT to Linux 5.10
- Add new MESON_EE driver support for GXBB & AXG
- Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards
- add driver for TDO tl070wsh30 panel driver
- meson: isolate loading of socinfo
- Add soc_rev to environment
- Enable G12A support for saradc
- Add correct mmcdev on VIM3(L) & Odroid-N2(C4)
- Read MAC from fuses for VIM3 & VIM3L boards
58 files changed, 3556 insertions, 978 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0f738c2..a9d36e0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -161,14 +161,19 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxl-s905x-p212.dtb \ meson-gxl-s805x-libretech-ac.dtb \ meson-gxl-s905x-libretech-cc.dtb \ + meson-gxl-s905x-libretech-cc-v2.dtb \ meson-gxl-s905x-khadas-vim.dtb \ meson-gxl-s905d-libretech-pc.dtb \ meson-gxm-khadas-vim2.dtb \ meson-gxm-s912-libretech-pc.dtb \ + meson-gxm-wetek-core2.dtb \ meson-axg-s400.dtb \ meson-g12a-u200.dtb \ meson-g12a-sei510.dtb \ + meson-g12b-gtking.dtb \ + meson-g12b-gtking-pro.dtb \ meson-g12b-odroid-n2.dtb \ + meson-g12b-odroid-n2-plus.dtb \ meson-g12b-a311d-khadas-vim3.dtb \ meson-sm1-khadas-vim3l.dtb \ meson-sm1-odroid-c4.dtb \ diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi index 8e6281c..b9efc84 100644 --- a/arch/arm/dts/meson-axg.dtsi +++ b/arch/arm/dts/meson-axg.dtsi @@ -181,8 +181,10 @@ interrupt-names = "macirq"; clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", + "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; status = "disabled"; diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts new file mode 100644 index 0000000..f0c56a1 --- /dev/null +++ b/arch/arm/dts/meson-g12b-gtking-pro.dts @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> + */ + +/dts-v1/; + +#include "meson-g12b-w400.dtsi" +#include <dt-bindings/sound/meson-g12a-tohdmitx.h> + +/ { + compatible = "azw,gtking", "amlogic,g12b"; + model = "Beelink GT-King Pro"; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + power-button { + label = "power"; + linux,code = <KEY_POWER>; + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + white { + label = "power:white"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "G12B-GTKING-PRO"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&arb { + status = "okay"; +}; + +&clkc_audio { + status = "okay"; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts new file mode 100644 index 0000000..eeb7bc5 --- /dev/null +++ b/arch/arm/dts/meson-g12b-gtking.dts @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> + */ + +/dts-v1/; + +#include "meson-g12b-w400.dtsi" +#include <dt-bindings/sound/meson-g12a-tohdmitx.h> + +/ { + compatible = "azw,gtking", "amlogic,g12b"; + model = "Beelink GT-King"; + + spdif_dit: audio-codec-1 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + status = "okay"; + sound-name-prefix = "DIT"; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "G12B-GTKING"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "SPDIFOUT IN 0", "FRDDR_A OUT 3", + "SPDIFOUT IN 1", "FRDDR_B OUT 3", + "SPDIFOUT IN 2", "FRDDR_C OUT 3"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* spdif hdmi or toslink interface */ + dai-link-4 { + sound-dai = <&spdifout>; + + codec-0 { + sound-dai = <&spdif_dit>; + }; + + codec-1 { + sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>; + }; + }; + + /* spdif hdmi interface */ + dai-link-5 { + sound-dai = <&spdifout_b>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>; + }; + }; + + /* hdmi glue */ + dai-link-6 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&arb { + status = "okay"; +}; + +&clkc_audio { + status = "okay"; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&spdifout { + pinctrl-0 = <&spdif_out_h_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&spdifout_b { + status = "okay"; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi index 224c890..f42cf4b 100644 --- a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi +++ b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi @@ -5,8 +5,6 @@ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> */ -#include <dt-bindings/sound/meson-g12a-tohdmitx.h> - / { model = "Khadas VIM3"; @@ -47,69 +45,6 @@ regulator-boot-on; regulator-always-on; }; - - sound { - compatible = "amlogic,axg-sound-card"; - model = "G12B-KHADAS-VIM3"; - audio-aux-devs = <&tdmout_a>; - audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", - "TDMOUT_A IN 1", "FRDDR_B OUT 0", - "TDMOUT_A IN 2", "FRDDR_C OUT 0", - "TDM_A Playback", "TDMOUT_A OUT"; - - assigned-clocks = <&clkc CLKID_MPLL2>, - <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&frddr_a>; - }; - - dai-link-1 { - sound-dai = <&frddr_b>; - }; - - dai-link-2 { - sound-dai = <&frddr_c>; - }; - - /* 8ch hdmi interface */ - dai-link-3 { - sound-dai = <&tdmif_a>; - dai-format = "i2s"; - dai-tdm-slot-tx-mask-0 = <1 1>; - dai-tdm-slot-tx-mask-1 = <1 1>; - dai-tdm-slot-tx-mask-2 = <1 1>; - dai-tdm-slot-tx-mask-3 = <1 1>; - mclk-fs = <256>; - - codec { - sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; - }; - }; - - /* hdmi glue */ - dai-link-4 { - sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; - - codec { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&arb { - status = "okay"; -}; - -&clkc_audio { - status = "okay"; }; &cpu0 { @@ -154,18 +89,6 @@ clock-latency = <50000>; }; -&frddr_a { - status = "okay"; -}; - -&frddr_b { - status = "okay"; -}; - -&frddr_c { - status = "okay"; -}; - &pwm_ab { pinctrl-0 = <&pwm_a_e_pins>; pinctrl-names = "default"; @@ -182,14 +105,3 @@ status = "okay"; }; -&tdmif_a { - status = "okay"; -}; - -&tdmout_a { - status = "okay"; -}; - -&tohdmitx { - status = "okay"; -}; diff --git a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts new file mode 100644 index 0000000..5de2815 --- /dev/null +++ b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/dts-v1/; + +/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */ +#include "meson-g12b-a311d.dtsi" +#include "meson-g12b-odroid-n2.dtsi" + +/ { + compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b"; + model = "Hardkernel ODROID-N2Plus"; +}; + +&vddcpu_a { + regulator-min-microvolt = <680000>; + regulator-max-microvolt = <1040000>; + + pwms = <&pwm_AO_cd 1 1500 0>; +}; + +&vddcpu_b { + regulator-min-microvolt = <680000>; + regulator-max-microvolt = <1040000>; + + pwms = <&pwm_AO_cd 1 1500 0>; +}; + diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts index 34fffa6..a198a91 100644 --- a/arch/arm/dts/meson-g12b-odroid-n2.dts +++ b/arch/arm/dts/meson-g12b-odroid-n2.dts @@ -7,625 +7,9 @@ /dts-v1/; #include "meson-g12b-s922x.dtsi" -#include <dt-bindings/input/input.h> -#include <dt-bindings/gpio/meson-g12a-gpio.h> -#include <dt-bindings/sound/meson-g12a-toacodec.h> -#include <dt-bindings/sound/meson-g12a-tohdmitx.h> +#include "meson-g12b-odroid-n2.dtsi" / { compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b"; model = "Hardkernel ODROID-N2"; - - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - dioo2133: audio-amplifier-0 { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; - VCC-supply = <&vcc_5v>; - sound-name-prefix = "U19"; - status = "okay"; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; - }; - - leds { - compatible = "gpio-leds"; - - blue { - label = "n2:blue"; - gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - tflash_vdd: regulator-tflash_vdd { - compatible = "regulator-fixed"; - - regulator-name = "TFLASH_VDD"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - }; - - tf_io: gpio-regulator-tf_io { - compatible = "regulator-gpio"; - - regulator-name = "TF_IO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; - gpios-states = <0>; - - states = <3300000 0>, - <1800000 1>; - }; - - flash_1v8: regulator-flash_1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_3v3>; - regulator-always-on; - }; - - main_12v: regulator-main_12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - }; - - vcc_5v: regulator-vcc_5v { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&main_12v>; - }; - - vcc_1v8: regulator-vcc_1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_3v3>; - regulator-always-on; - }; - - vcc_3v3: regulator-vcc_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - /* FIXME: actually controlled by VDDCPU_B_EN */ - }; - - vddcpu_a: regulator-vddcpu-a { - /* - * MP8756GD Regulator. - */ - compatible = "pwm-regulator"; - - regulator-name = "VDDCPU_A"; - regulator-min-microvolt = <721000>; - regulator-max-microvolt = <1022000>; - - vin-supply = <&main_12v>; - - pwms = <&pwm_ab 0 1250 0>; - pwm-dutycycle-range = <100 0>; - - regulator-boot-on; - regulator-always-on; - }; - - vddcpu_b: regulator-vddcpu-b { - /* - * Silergy SY8120B1ABC Regulator. - */ - compatible = "pwm-regulator"; - - regulator-name = "VDDCPU_B"; - regulator-min-microvolt = <721000>; - regulator-max-microvolt = <1022000>; - - vin-supply = <&main_12v>; - - pwms = <&pwm_AO_cd 1 1250 0>; - pwm-dutycycle-range = <100 0>; - - regulator-boot-on; - regulator-always-on; - }; - - hub_5v: regulator-hub_5v { - compatible = "regulator-fixed"; - regulator-name = "HUB_5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_5v>; - - /* Connected to the Hub CHIPENABLE, LOW sets low power state */ - gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - usb_pwr_en: regulator-usb_pwr_en { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR_EN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_5v>; - - /* Connected to the microUSB port power enable */ - gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vddao_1v8: regulator-vddao_1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - }; - - vddao_3v3: regulator-vddao_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&main_12v>; - regulator-always-on; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; - - sound { - compatible = "amlogic,axg-sound-card"; - model = "G12B-ODROID-N2"; - audio-widgets = "Line", "Lineout"; - audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>, - <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>, - <&dioo2133>; - audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", - "TDMOUT_B IN 1", "FRDDR_B OUT 1", - "TDMOUT_B IN 2", "FRDDR_C OUT 1", - "TDM_B Playback", "TDMOUT_B OUT", - "TDMOUT_C IN 0", "FRDDR_A OUT 2", - "TDMOUT_C IN 1", "FRDDR_B OUT 2", - "TDMOUT_C IN 2", "FRDDR_C OUT 2", - "TDM_C Playback", "TDMOUT_C OUT", - "TDMIN_A IN 4", "TDM_B Loopback", - "TDMIN_B IN 4", "TDM_B Loopback", - "TDMIN_C IN 4", "TDM_B Loopback", - "TDMIN_LB IN 1", "TDM_B Loopback", - "TDMIN_A IN 5", "TDM_C Loopback", - "TDMIN_B IN 5", "TDM_C Loopback", - "TDMIN_C IN 5", "TDM_C Loopback", - "TDMIN_LB IN 2", "TDM_C Loopback", - "TODDR_A IN 0", "TDMIN_A OUT", - "TODDR_B IN 0", "TDMIN_A OUT", - "TODDR_C IN 0", "TDMIN_A OUT", - "TODDR_A IN 1", "TDMIN_B OUT", - "TODDR_B IN 1", "TDMIN_B OUT", - "TODDR_C IN 1", "TDMIN_B OUT", - "TODDR_A IN 2", "TDMIN_C OUT", - "TODDR_B IN 2", "TDMIN_C OUT", - "TODDR_C IN 2", "TDMIN_C OUT", - "TODDR_A IN 6", "TDMIN_LB OUT", - "TODDR_B IN 6", "TDMIN_LB OUT", - "TODDR_C IN 6", "TDMIN_LB OUT", - "U19 INL", "ACODEC LOLP", - "U19 INR", "ACODEC LORP", - "Lineout", "U19 OUTL", - "Lineout", "U19 OUTR"; - - assigned-clocks = <&clkc CLKID_MPLL2>, - <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&frddr_a>; - }; - - dai-link-1 { - sound-dai = <&frddr_b>; - }; - - dai-link-2 { - sound-dai = <&frddr_c>; - }; - - dai-link-3 { - sound-dai = <&toddr_a>; - }; - - dai-link-4 { - sound-dai = <&toddr_b>; - }; - - dai-link-5 { - sound-dai = <&toddr_c>; - }; - - /* 8ch hdmi interface */ - dai-link-6 { - sound-dai = <&tdmif_b>; - dai-format = "i2s"; - dai-tdm-slot-tx-mask-0 = <1 1>; - dai-tdm-slot-tx-mask-1 = <1 1>; - dai-tdm-slot-tx-mask-2 = <1 1>; - dai-tdm-slot-tx-mask-3 = <1 1>; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; - }; - - codec-1 { - sound-dai = <&toacodec TOACODEC_IN_B>; - }; - }; - - /* i2s jack output interface */ - dai-link-7 { - sound-dai = <&tdmif_c>; - dai-format = "i2s"; - dai-tdm-slot-tx-mask-0 = <1 1>; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>; - }; - - codec-1 { - sound-dai = <&toacodec TOACODEC_IN_C>; - }; - }; - - /* hdmi glue */ - dai-link-8 { - sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; - - codec { - sound-dai = <&hdmi_tx>; - }; - }; - - /* acodec glue */ - dai-link-9 { - sound-dai = <&toacodec TOACODEC_OUT>; - - codec { - sound-dai = <&acodec>; - }; - }; - }; -}; - -&acodec { - AVDD-supply = <&vddao_1v8>; - status = "okay"; -}; - -&arb { - status = "okay"; -}; - -&cec_AO { - pinctrl-0 = <&cec_ao_a_h_pins>; - pinctrl-names = "default"; - status = "disabled"; - hdmi-phandle = <&hdmi_tx>; -}; - -&cecb_AO { - pinctrl-0 = <&cec_ao_b_h_pins>; - pinctrl-names = "default"; - status = "okay"; - hdmi-phandle = <&hdmi_tx>; -}; - -&clkc_audio { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vddcpu_b>; - operating-points-v2 = <&cpu_opp_table_0>; - clocks = <&clkc CLKID_CPU_CLK>; - clock-latency = <50000>; -}; - -&cpu1 { - cpu-supply = <&vddcpu_b>; - operating-points-v2 = <&cpu_opp_table_0>; - clocks = <&clkc CLKID_CPU_CLK>; - clock-latency = <50000>; -}; - -&cpu100 { - cpu-supply = <&vddcpu_a>; - operating-points-v2 = <&cpub_opp_table_1>; - clocks = <&clkc CLKID_CPUB_CLK>; - clock-latency = <50000>; -}; - -&cpu101 { - cpu-supply = <&vddcpu_a>; - operating-points-v2 = <&cpub_opp_table_1>; - clocks = <&clkc CLKID_CPUB_CLK>; - clock-latency = <50000>; -}; - -&cpu102 { - cpu-supply = <&vddcpu_a>; - operating-points-v2 = <&cpub_opp_table_1>; - clocks = <&clkc CLKID_CPUB_CLK>; - clock-latency = <50000>; -}; - -&cpu103 { - cpu-supply = <&vddcpu_a>; - operating-points-v2 = <&cpub_opp_table_1>; - clocks = <&clkc CLKID_CPUB_CLK>; - clock-latency = <50000>; -}; - -&ext_mdio { - external_phy: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; - max-speed = <1000>; - - reset-assert-us = <10000>; - reset-deassert-us = <30000>; - reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_14 */ - interrupts = <26 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -ðmac { - pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii"; - phy-handle = <&external_phy>; - amlogic,tx-delay-ns = <2>; -}; - -&frddr_a { - status = "okay"; -}; - -&frddr_b { - status = "okay"; -}; - -&frddr_c { - status = "okay"; -}; - -&gpio { - /* - * WARNING: The USB Hub on the Odroid-N2 needs a reset signal - * to be turned high in order to be detected by the USB Controller - * This signal should be handled by a USB specific power sequence - * in order to reset the Hub when USB bus is powered down. - */ - usb-hub { - gpio-hog; - gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "usb-hub-reset"; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; - pinctrl-names = "default"; - hdmi-supply = <&vcc_5v>; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; - linux,rc-map-name = "rc-odroid"; -}; - -&pwm_ab { - pinctrl-0 = <&pwm_a_e_pins>; - pinctrl-names = "default"; - clocks = <&xtal>; - clock-names = "clkin0"; - status = "okay"; -}; - -&pwm_AO_cd { - pinctrl-0 = <&pwm_ao_d_e_pins>; - pinctrl-names = "default"; - clocks = <&xtal>; - clock-names = "clkin1"; - status = "okay"; -}; - -/* SD card */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_c_pins>; - pinctrl-1 = <&sdcard_clk_gate_c_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - disable-wp; - - cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; - vmmc-supply = <&tflash_vdd>; - vqmmc-supply = <&tf_io>; - -}; - -/* eMMC */ -&sd_emmc_c { - status = "okay"; - pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - max-frequency = <200000000>; - disable-wp; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&flash_1v8>; -}; - -/* - * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins - * and eMMC Data 4 to 7 pins. - * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, - * and change bus-width to 4 then spifc can be enabled. - * The SW1 slide should also be set to the correct position. - */ -&spifc { - status = "disabled"; - pinctrl-0 = <&nor_pins>; - pinctrl-names = "default"; - - mx25u64: spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mxicy,mx25u6435f", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <104000000>; - }; -}; - -&tdmif_b { - status = "okay"; -}; - -&tdmif_c { - status = "okay"; -}; - -&tdmin_a { - status = "okay"; -}; - -&tdmin_b { - status = "okay"; -}; - -&tdmin_c { - status = "okay"; -}; - -&tdmin_lb { - status = "okay"; -}; - -&tdmout_b { - status = "okay"; -}; - -&tdmout_c { - status = "okay"; -}; - -&toacodec { - status = "okay"; -}; - -&tohdmitx { - status = "okay"; -}; - -&toddr_a { - status = "okay"; -}; - -&toddr_b { - status = "okay"; -}; - -&toddr_c { - status = "okay"; -}; - -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&usb { - status = "okay"; - vbus-supply = <&usb_pwr_en>; -}; - -&usb2_phy0 { - phy-supply = <&vcc_5v>; -}; - -&usb2_phy1 { - /* Enable the hub which is connected to this port */ - phy-supply = <&hub_5v>; }; diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dtsi b/arch/arm/dts/meson-g12b-odroid-n2.dtsi new file mode 100644 index 0000000..6982632 --- /dev/null +++ b/arch/arm/dts/meson-g12b-odroid-n2.dtsi @@ -0,0 +1,625 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/meson-g12a-gpio.h> +#include <dt-bindings/sound/meson-g12a-toacodec.h> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h> + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + dioo2133: audio-amplifier-0 { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + VCC-supply = <&vcc_5v>; + sound-name-prefix = "U19"; + status = "okay"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + leds { + compatible = "gpio-leds"; + + blue { + label = "n2:blue"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + tflash_vdd: regulator-tflash_vdd { + compatible = "regulator-fixed"; + + regulator-name = "TFLASH_VDD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + tf_io: gpio-regulator-tf_io { + compatible = "regulator-gpio"; + + regulator-name = "TF_IO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + + states = <3300000 0>, + <1800000 1>; + }; + + flash_1v8: regulator-flash_1v8 { + compatible = "regulator-fixed"; + regulator-name = "FLASH_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + main_12v: regulator-main_12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + vcc_5v: regulator-vcc_5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&main_12v>; + }; + + vcc_1v8: regulator-vcc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + /* FIXME: actually controlled by VDDCPU_B_EN */ + }; + + vddcpu_a: regulator-vddcpu-a { + /* + * MP8756GD Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_A"; + regulator-min-microvolt = <721000>; + regulator-max-microvolt = <1022000>; + + vin-supply = <&main_12v>; + + pwms = <&pwm_ab 0 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + vddcpu_b: regulator-vddcpu-b { + /* + * Silergy SY8120B1ABC Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_B"; + regulator-min-microvolt = <721000>; + regulator-max-microvolt = <1022000>; + + vin-supply = <&main_12v>; + + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + hub_5v: regulator-hub_5v { + compatible = "regulator-fixed"; + regulator-name = "HUB_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + /* Connected to the Hub CHIPENABLE, LOW sets low power state */ + gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb_pwr_en: regulator-usb_pwr_en { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR_EN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + /* Connected to the microUSB port power enable */ + gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddao_1v8: regulator-vddao_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-always-on; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "G12B-ODROID-N2"; + audio-widgets = "Line", "Lineout"; + audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>, + <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>, + <&dioo2133>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TDMOUT_C IN 0", "FRDDR_A OUT 2", + "TDMOUT_C IN 1", "FRDDR_B OUT 2", + "TDMOUT_C IN 2", "FRDDR_C OUT 2", + "TDM_C Playback", "TDMOUT_C OUT", + "TDMIN_A IN 4", "TDM_B Loopback", + "TDMIN_B IN 4", "TDM_B Loopback", + "TDMIN_C IN 4", "TDM_B Loopback", + "TDMIN_LB IN 1", "TDM_B Loopback", + "TDMIN_A IN 5", "TDM_C Loopback", + "TDMIN_B IN 5", "TDM_C Loopback", + "TDMIN_C IN 5", "TDM_C Loopback", + "TDMIN_LB IN 2", "TDM_C Loopback", + "TODDR_A IN 0", "TDMIN_A OUT", + "TODDR_B IN 0", "TDMIN_A OUT", + "TODDR_C IN 0", "TDMIN_A OUT", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "TODDR_A IN 2", "TDMIN_C OUT", + "TODDR_B IN 2", "TDMIN_C OUT", + "TODDR_C IN 2", "TDMIN_C OUT", + "TODDR_A IN 6", "TDMIN_LB OUT", + "TODDR_B IN 6", "TDMIN_LB OUT", + "TODDR_C IN 6", "TDMIN_LB OUT", + "U19 INL", "ACODEC LOLP", + "U19 INR", "ACODEC LORP", + "Lineout", "U19 OUTL", + "Lineout", "U19 OUTR"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + dai-link-3 { + sound-dai = <&toddr_a>; + }; + + dai-link-4 { + sound-dai = <&toddr_b>; + }; + + dai-link-5 { + sound-dai = <&toddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-6 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + + codec-1 { + sound-dai = <&toacodec TOACODEC_IN_B>; + }; + }; + + /* i2s jack output interface */ + dai-link-7 { + sound-dai = <&tdmif_c>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>; + }; + + codec-1 { + sound-dai = <&toacodec TOACODEC_IN_C>; + }; + }; + + /* hdmi glue */ + dai-link-8 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + + /* acodec glue */ + dai-link-9 { + sound-dai = <&toacodec TOACODEC_OUT>; + + codec { + sound-dai = <&acodec>; + }; + }; + }; +}; + +&acodec { + AVDD-supply = <&vddao_1v8>; + status = "okay"; +}; + +&arb { + status = "okay"; +}; + +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&clkc_audio { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu100 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu101 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu102 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu103 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +ðmac { + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <&external_phy>; + amlogic,tx-delay-ns = <2>; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&gpio { + /* + * WARNING: The USB Hub on the Odroid-N2 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ + usb-hub { + gpio-hog; + gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "usb-hub-reset"; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vcc_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; + linux,rc-map-name = "rc-odroid"; +}; + +&pwm_ab { + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&tflash_vdd>; + vqmmc-supply = <&tf_io>; + +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&flash_1v8>; +}; + +/* + * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins + * and eMMC Data 4 to 7 pins. + * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, + * and change bus-width to 4 then spifc can be enabled. + * The SW1 slide should also be set to the correct position. + */ +&spifc { + status = "disabled"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + mx25u64: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25u6435f", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + }; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmif_c { + status = "okay"; +}; + +&tdmin_a { + status = "okay"; +}; + +&tdmin_b { + status = "okay"; +}; + +&tdmin_c { + status = "okay"; +}; + +&tdmin_lb { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&tdmout_c { + status = "okay"; +}; + +&toacodec { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + +&toddr_a { + status = "okay"; +}; + +&toddr_b { + status = "okay"; +}; + +&toddr_c { + status = "okay"; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + vbus-supply = <&usb_pwr_en>; +}; + +&usb2_phy0 { + phy-supply = <&vcc_5v>; +}; + +&usb2_phy1 { + /* Enable the hub which is connected to this port */ + phy-supply = <&hub_5v>; +}; diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi new file mode 100644 index 0000000..2802ddb --- /dev/null +++ b/arch/arm/dts/meson-g12b-w400.dtsi @@ -0,0 +1,425 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> + */ + +/dts-v1/; + +#include "meson-g12b.dtsi" +#include "meson-g12b-s922x.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/meson-g12a-gpio.h> + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + flash_1v8: regulator-flash_1v8 { + compatible = "regulator-fixed"; + regulator-name = "FLASH_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + main_12v: regulator-main_12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + vcc_5v: regulator-vcc_5v { + compatible = "regulator-fixed"; + regulator-name = "VCC_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&main_12v>; + + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-high; + }; + + vcc_1v8: regulator-vcc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + /* FIXME: actually controlled by VDDCPU_B_EN */ + }; + + vddcpu_a: regulator-vddcpu-a { + /* + * MP1653 Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_A"; + regulator-min-microvolt = <721000>; + regulator-max-microvolt = <1022000>; + + vin-supply = <&main_12v>; + + pwms = <&pwm_ab 0 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + vddcpu_b: regulator-vddcpu-b { + /* + * MP1652 Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU_B"; + regulator-min-microvolt = <721000>; + regulator-max-microvolt = <1022000>; + + vin-supply = <&main_12v>; + + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + usb1_pow: regulator-usb1-pow { + compatible = "regulator-fixed"; + regulator-name = "USB1_POW"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + /* connected to SY6280A Power Switch */ + gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb_pwr_en: regulator-usb-pwr-en { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR_EN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + /* Connected to USB3 Type-A Port power enable */ + gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddao_1v8: regulator-vddao-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-always-on; + }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; +}; + +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cpu0 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu_b>; + operating-points-v2 = <&cpu_opp_table_0>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu100 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu101 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu102 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cpu103 { + cpu-supply = <&vddcpu_a>; + operating-points-v2 = <&cpub_opp_table_1>; + clocks = <&clkc CLKID_CPUB_CLK>; + clock-latency = <50000>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +ðmac { + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <&external_phy>; + amlogic,tx-delay-ns = <2>; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vcc_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ab { + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +&pwm_ef { + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; + status = "okay"; +}; + +/* SDIO */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_1v8>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <100000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&flash_1v8>; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + dr_mode = "host"; + vbus-supply = <&usb_pwr_en>; +}; + +&usb2_phy0 { + phy-supply = <&usb1_pow>; +}; + +&usb2_phy1 { + phy-supply = <&usb1_pow>; +}; diff --git a/arch/arm/dts/meson-gx-mali450.dtsi b/arch/arm/dts/meson-gx-mali450.dtsi new file mode 100644 index 0000000..f9771b5 --- /dev/null +++ b/arch/arm/dts/meson-gx-mali450.dtsi @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/ { + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-125000000 { + opp-hz = /bits/ 64 <125000000>; + opp-microvolt = <950000>; + }; + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <950000>; + }; + opp-285714285 { + opp-hz = /bits/ 64 <285714285>; + opp-microvolt = <950000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <950000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <950000>; + }; + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <950000>; + }; + opp-744000000 { + opp-hz = /bits/ 64 <744000000>; + opp-microvolt = <950000>; + }; + }; +}; + +&apb { + mali: gpu@c0000 { + compatible = "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + operating-points-v2 = <&gpu_opp_table>; + }; +}; diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi new file mode 100644 index 0000000..6b57e15 --- /dev/null +++ b/arch/arm/dts/meson-gx-p23x-q20x.dtsi @@ -0,0 +1,324 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Endless Computers, Inc. + * Author: Carlo Caione <carlo@endlessm.com> + */ + +/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either + * the pin-compatible S912 (GXM) or S905D (GXL) SoCs. + */ + +#include <dt-bindings/sound/meson-aiu.h> + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + dio2133: analog-amplifier { + compatible = "simple-audio-amplifier"; + sound-name-prefix = "AU2"; + VCC-supply = <&hdmi_5v>; + enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; + }; + + spdif_dit: audio-codec-0 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + status = "okay"; + sound-name-prefix = "DIT"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + hdmi_5v: regulator-hdmi-5v { + compatible = "regulator-fixed"; + + regulator-name = "HDMI_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + sound { + compatible = "amlogic,gx-sound-card"; + model = "GX-P230-Q200"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Line", "Lineout"; + audio-routing = "AU2 INL", "ACODEC LOLP", + "AU2 INR", "ACODEC LORP", + "AU2 INL", "ACODEC LOLN", + "AU2 INR", "ACODEC LORN", + "Lineout", "AU2 OUTL", + "Lineout", "AU2 OUTR"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; + }; + + dai-link-1 { + sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; + }; + + dai-link-2 { + sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; + dai-format = "i2s"; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&aiu AIU_HDMI CTRL_I2S>; + }; + + codec-1 { + sound-dai = <&aiu AIU_ACODEC CTRL_I2S>; + }; + }; + + dai-link-3 { + sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; + + codec-0 { + sound-dai = <&spdif_dit>; + }; + }; + + dai-link-4 { + sound-dai = <&aiu AIU_HDMI CTRL_OUT>; + + codec-0 { + sound-dai = <&hdmi_tx>; + }; + }; + + dai-link-5 { + sound-dai = <&aiu AIU_ACODEC CTRL_OUT>; + + codec-0 { + sound-dai = <&acodec>; + }; + }; + }; +}; + +&acodec { + AVDD-supply = <&vddio_ao18>; + status = "okay"; +}; + +&aiu { + status = "okay"; + pinctrl-0 = <&spdif_out_h_pins>; + pinctrl-names = "default"; + +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +ðmac { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; + hdmi-supply = <&hdmi_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* This UART is brought out to the DB9 connector */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + dr_mode = "otg"; +}; diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi index ba63c36..0edd137 100644 --- a/arch/arm/dts/meson-gx.dtsi +++ b/arch/arm/dts/meson-gx.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/meson-gxbb-power.h> #include <dt-bindings/thermal/thermal.h> / { @@ -60,7 +61,7 @@ compatible = "amlogic,simple-framebuffer", "simple-framebuffer"; amlogic,pipeline = "vpu-cvbs"; - power-domains = <&pwrc_vpu>; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; status = "disabled"; }; @@ -68,7 +69,7 @@ compatible = "amlogic,simple-framebuffer", "simple-framebuffer"; amlogic,pipeline = "vpu-hdmi"; - power-domains = <&pwrc_vpu>; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; status = "disabled"; }; }; @@ -438,12 +439,6 @@ compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; reg = <0x0 0x0 0x0 0x100>; - pwrc_vpu: power-controller-vpu { - compatible = "amlogic,meson-gx-pwrc-vpu"; - #power-domain-cells = <0>; - amlogic,hhi-sysctrl = <&sysctrl>; - }; - clkc_AO: clock-controller { compatible = "amlogic,meson-gx-aoclkc"; #clock-cells = <1>; @@ -552,6 +547,12 @@ sysctrl: system-controller@0 { compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; reg = <0 0 0 0x400>; + + pwrc: power-controller { + compatible = "amlogic,meson-gxbb-pwrc"; + #power-domain-cells = <1>; + amlogic,ao-sysctrl = <&sysctrl_AO>; + }; }; mailbox: mailbox@404 { @@ -574,6 +575,7 @@ interrupt-names = "macirq"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; + power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>; status = "disabled"; }; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi index 234490d..7c029f5 100644 --- a/arch/arm/dts/meson-gxbb.dtsi +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -4,6 +4,7 @@ */ #include "meson-gx.dtsi" +#include "meson-gx-mali450.dtsi" #include <dt-bindings/gpio/meson-gxbb-gpio.h> #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> #include <dt-bindings/clock/gxbb-clkc.h> @@ -264,46 +265,6 @@ }; }; -&apb { - mali: gpu@c0000 { - compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; - reg = <0x0 0xc0000 0x0 0x40000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", "gpmmu", "pp", "pmu", - "pp0", "ppmmu0", "pp1", "ppmmu1", - "pp2", "ppmmu2"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_GP0_PLL>, - <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <0>, /* Do Nothing */ - <&clkc CLKID_GP0_PLL>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <744000000>, - <0>, /* Do Nothing */ - <744000000>, - <0>; /* Do Nothing */ - }; -}; - &cbus { spifc: spi@8c80 { compatible = "amlogic,meson-gxbb-spifc"; @@ -333,8 +294,9 @@ ðmac { clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; }; &gpio_intc { @@ -385,6 +347,16 @@ clocks = <&clkc CLKID_I2C>; }; +&mali { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <744000000>; +}; + &periphs { pinctrl_periphs: pinctrl@4b0 { compatible = "amlogic,meson-gxbb-periphs-pinctrl"; @@ -747,7 +719,7 @@ }; }; -&pwrc_vpu { +&pwrc { resets = <&reset RESET_VIU>, <&reset RESET_VENC>, <&reset RESET_VCBUS>, @@ -760,6 +732,9 @@ <&reset RESET_VDI6>, <&reset RESET_VENCL>, <&reset RESET_VID_LOCK>; + reset-names = "viu", "venc", "vcbus", "bt656", + "dvin", "rdma", "venci", "vencp", + "vdac", "vdi6", "vencl", "vid_lock"; clocks = <&clkc CLKID_VPU>, <&clkc CLKID_VAPB>; clock-names = "vpu", "vapb"; @@ -866,7 +841,7 @@ &vpu { compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; - power-domains = <&pwrc_vpu>; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; }; &vdec { diff --git a/arch/arm/dts/meson-gxl-mali.dtsi b/arch/arm/dts/meson-gxl-mali.dtsi index 6aaafff..478e755 100644 --- a/arch/arm/dts/meson-gxl-mali.dtsi +++ b/arch/arm/dts/meson-gxl-mali.dtsi @@ -4,42 +4,14 @@ * Author: Neil Armstrong <narmstrong@baylibre.com> */ -&apb { - mali: gpu@c0000 { - compatible = "amlogic,meson-gxl-mali", "arm,mali-450"; - reg = <0x0 0xc0000 0x0 0x40000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", "gpmmu", "pp", "pmu", - "pp0", "ppmmu0", "pp1", "ppmmu1", - "pp2", "ppmmu2"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; +#include "meson-gx-mali450.dtsi" - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_GP0_PLL>, - <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <0>, /* Do Nothing */ - <&clkc CLKID_GP0_PLL>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <744000000>, - <0>, /* Do Nothing */ - <744000000>, - <0>; /* Do Nothing */ - }; +&mali { + compatible = "amlogic,meson-gxl-mali", "arm,mali-450"; + + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <744000000>; }; diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts index 6a226fa..9e43f4d 100644 --- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts @@ -10,7 +10,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/sound/meson-aiu.h> -#include "meson-gxl-s905x.dtsi" +#include "meson-gxl-s805x.dtsi" / { compatible = "libretech,aml-s805x-ac", "amlogic,s805x", diff --git a/arch/arm/dts/meson-gxl-s805x.dtsi b/arch/arm/dts/meson-gxl-s805x.dtsi new file mode 100644 index 0000000..2997584 --- /dev/null +++ b/arch/arm/dts/meson-gxl-s805x.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-gxl-s905x.dtsi" + +/ { + compatible = "amlogic,s805x", "amlogic,meson-gxl"; +}; + +/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */ +&gpu_opp_table { + opp-744000000 { + status = "disabled"; + }; +}; + +&mali { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-rates; +}; diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2-u-boot.dtsi new file mode 100644 index 0000000..8ff5a0e --- /dev/null +++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + */ + +#include "meson-gxl-u-boot.dtsi" diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts new file mode 100644 index 0000000..675eaa8 --- /dev/null +++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/sound/meson-aiu.h> + +#include "meson-gxl-s905x.dtsi" + +/ { + compatible = "libretech,aml-s905x-cc-v2", "amlogic,s905x", + "amlogic,meson-gxl"; + model = "Libre Computer AML-S905X-CC V2"; + + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + spi0 = &spifc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-blue { + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + panic-indicator; + }; + + led-green { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_DISK_ACTIVITY; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "disk-activity"; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + ao_5v: regulator-ao_5v { + compatible = "regulator-fixed"; + regulator-name = "AO_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + dc_in: regulator-dc_in { + compatible = "regulator-fixed"; + regulator-name = "DC_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + + vcck: regulator-vcck { + compatible = "regulator-fixed"; + regulator-name = "VCCK"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&ao_5v>; + regulator-always-on; + }; + + vcc_card: regulator-vcc_card { + compatible = "regulator-fixed"; + regulator-name = "VCC_CARD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddio_ao3v3>; + + gpio = <&gpio GPIOCLK_1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc5v: regulator-vcc5v { + compatible = "regulator-fixed"; + regulator-name = "VCC5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&ao_5v>; + + gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>; + }; + + vddio_ao3v3: regulator-vddio_ao3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&ao_5v>; + regulator-always-on; + }; + + + vddio_card: regulator-vddio-card { + compatible = "regulator-gpio"; + regulator-name = "VDDIO_CARD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + + states = <3300000 0>, + <1800000 1>; + + regulator-settling-time-up-us = <200>; + regulator-settling-time-down-us = <50000>; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddio_ao3v3>; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC 1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddio_ao3v3>; + regulator-always-on; + }; + + sound { + compatible = "amlogic,gx-sound-card"; + model = "GXL-LIBRETECH-S905X-CC-V2"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; + }; + + dai-link-1 { + sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; + dai-format = "i2s"; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&aiu AIU_HDMI CTRL_I2S>; + }; + }; + + dai-link-2 { + sound-dai = <&aiu AIU_HDMI CTRL_OUT>; + + codec-0 { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + + +&aiu { + status = "okay"; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + + +ðmac { + status = "okay"; +}; + +&internal_phy { + pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>; + pinctrl-names = "default"; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + hdmi-supply = <&vcc5v>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +/* SD card */ +&sd_emmc_b { + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-ddr50; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vcc_card>; + vqmmc-supply = <&vddio_card>; + + status = "okay"; +}; + +/* eMMC */ +&sd_emmc_c { + pinctrl-0 = <&emmc_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vddio_ao3v3>; + vqmmc-supply = <&vcc_1v8>; + + status = "okay"; +}; + +&spifc { + status = "okay"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + nor_4u1: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <3000000>; + }; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + dr_mode = "host"; +}; + +&usb2_phy0 { + pinctrl-names = "default"; + phy-supply = <&vcc5v>; +}; + +&usb2_phy1 { + phy-supply = <&vcc5v>; +}; diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi index fc59c85..c3ac531 100644 --- a/arch/arm/dts/meson-gxl.dtsi +++ b/arch/arm/dts/meson-gxl.dtsi @@ -131,8 +131,9 @@ ðmac { clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; mdio0: mdio { #address-cells = <1>; @@ -337,6 +338,11 @@ }; }; +&hwrng { + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + &i2c_A { clocks = <&clkc CLKID_I2C>; }; @@ -782,7 +788,7 @@ }; }; -&pwrc_vpu { +&pwrc { resets = <&reset RESET_VIU>, <&reset RESET_VENC>, <&reset RESET_VCBUS>, @@ -795,6 +801,9 @@ <&reset RESET_VDI6>, <&reset RESET_VENCL>, <&reset RESET_VID_LOCK>; + reset-names = "viu", "venc", "vcbus", "bt656", + "dvin", "rdma", "venci", "vencp", + "vdac", "vdi6", "vencl", "vid_lock"; clocks = <&clkc CLKID_VPU>, <&clkc CLKID_VAPB>; clock-names = "vpu", "vapb"; @@ -901,7 +910,7 @@ &vpu { compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; - power-domains = <&pwrc_vpu>; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; }; &vdec { diff --git a/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi b/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi new file mode 100644 index 0000000..39270ea --- /dev/null +++ b/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-gxl-u-boot.dtsi" diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts new file mode 100644 index 0000000..ec794c1 --- /dev/null +++ b/arch/arm/dts/meson-gxm-wetek-core2.dts @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com> + */ + +/dts-v1/; + +#include "meson-gxm.dtsi" +#include "meson-gx-p23x-q20x.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + compatible = "wetek,core2", "amlogic,s912", "amlogic,meson-gxm"; + model = "WeTek Core 2"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */ + }; + + leds { + compatible = "gpio-leds"; + + blue { + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1710000>; + + button-update { + label = "update"; + linux,code = <KEY_VENDOR>; + press-threshold-microvolt = <10000>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + button-power { + label = "power"; + linux,code = <KEY_POWER>; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* Disabled as Realtek RTL8152 USB provides Ethernet */ +ðmac { + status = "disabled"; +}; + +&internal_phy { + status = "disabled"; +}; + +&ir { + linux,rc-map-name = "rc-wetek-play2"; +}; + +/* This is connected to the Bluetooth module: */ +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; +}; diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi index 40e3e12..fe41451 100644 --- a/arch/arm/dts/meson-gxm.dtsi +++ b/arch/arm/dts/meson-gxm.dtsi @@ -82,6 +82,35 @@ #cooling-cells = <2>; }; }; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-125000000 { + opp-hz = /bits/ 64 <125000000>; + opp-microvolt = <950000>; + }; + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <950000>; + }; + opp-285714285 { + opp-hz = /bits/ 64 <285714285>; + opp-microvolt = <950000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <950000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <950000>; + }; + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <950000>; + }; + }; }; &apb { @@ -106,21 +135,7 @@ interrupt-names = "job", "mmu", "gpu"; clocks = <&clkc CLKID_MALI>; resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, - <0>; /* Do Nothing */ + operating-points-v2 = <&gpu_opp_table>; }; }; diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi index 94f75b4..7b46555 100644 --- a/arch/arm/dts/meson-khadas-vim3.dtsi +++ b/arch/arm/dts/meson-khadas-vim3.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/meson-g12a-gpio.h> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h> / { aliases { @@ -41,13 +42,13 @@ led-white { label = "vim3:white:sys"; - gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>; + gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; led-red { label = "vim3:red"; - gpios = <&gpio_expander 5 GPIO_ACTIVE_LOW>; + gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>; }; }; @@ -161,6 +162,62 @@ }; }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "G12B-KHADAS-VIM3"; + audio-aux-devs = <&tdmout_a>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-3 { + sound-dai = <&tdmif_a>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; + }; + }; + + /* hdmi glue */ + dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; + wifi32k: wifi32k { compatible = "pwm-clock"; #clock-cells = <0>; @@ -169,6 +226,14 @@ }; }; +&arb { + status = "okay"; +}; + +&clkc_audio { + status = "okay"; +}; + &cec_AO { pinctrl-0 = <&cec_ao_a_h_pins>; pinctrl-names = "default"; @@ -221,6 +286,18 @@ amlogic,tx-delay-ns = <2>; }; +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + &hdmi_tx { status = "okay"; pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; @@ -368,6 +445,19 @@ }; }; + +&tdmif_a { + status = "okay"; +}; + +&tdmout_a { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + &uart_A { status = "okay"; pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts index 0da56c0..4b517ca 100644 --- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts +++ b/arch/arm/dts/meson-sm1-khadas-vim3l.dts @@ -32,69 +32,6 @@ regulator-boot-on; regulator-always-on; }; - - sound { - compatible = "amlogic,axg-sound-card"; - model = "SM1-KHADAS-VIM3L"; - audio-aux-devs = <&tdmout_a>; - audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", - "TDMOUT_A IN 1", "FRDDR_B OUT 0", - "TDMOUT_A IN 2", "FRDDR_C OUT 0", - "TDM_A Playback", "TDMOUT_A OUT"; - - assigned-clocks = <&clkc CLKID_MPLL2>, - <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&frddr_a>; - }; - - dai-link-1 { - sound-dai = <&frddr_b>; - }; - - dai-link-2 { - sound-dai = <&frddr_c>; - }; - - /* 8ch hdmi interface */ - dai-link-3 { - sound-dai = <&tdmif_a>; - dai-format = "i2s"; - dai-tdm-slot-tx-mask-0 = <1 1>; - dai-tdm-slot-tx-mask-1 = <1 1>; - dai-tdm-slot-tx-mask-2 = <1 1>; - dai-tdm-slot-tx-mask-3 = <1 1>; - mclk-fs = <256>; - - codec { - sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; - }; - }; - - /* hdmi glue */ - dai-link-4 { - sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; - - codec { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&arb { - status = "okay"; -}; - -&clkc_audio { - status = "okay"; }; &cpu0 { @@ -125,18 +62,6 @@ clock-latency = <50000>; }; -&frddr_a { - status = "okay"; -}; - -&frddr_b { - status = "okay"; -}; - -&frddr_c { - status = "okay"; -}; - &pwm_AO_cd { pinctrl-0 = <&pwm_ao_d_e_pins>; pinctrl-names = "default"; @@ -174,14 +99,3 @@ }; */ -&tdmif_a { - status = "okay"; -}; - -&tdmout_a { - status = "okay"; -}; - -&tohdmitx { - status = "okay"; -}; diff --git a/arch/arm/include/asm/arch-meson/boot.h b/arch/arm/include/asm/arch-meson/boot.h index a90fe55..c67d12d 100644 --- a/arch/arm/include/asm/arch-meson/boot.h +++ b/arch/arm/include/asm/arch-meson/boot.h @@ -7,6 +7,8 @@ #ifndef __MESON_BOOT_H__ #define __MESON_BOOT_H__ +#include <linux/types.h> + /* Boot device */ #define BOOT_DEVICE_RESERVED 0 #define BOOT_DEVICE_EMMC 1 @@ -17,4 +19,6 @@ int meson_get_boot_device(void); +int meson_get_soc_rev(char *buff, size_t buff_len); + #endif /* __MESON_BOOT_H__ */ diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c index e61d1ad..90e7dfa 100644 --- a/arch/arm/mach-meson/board-info.c +++ b/arch/arm/mach-meson/board-info.c @@ -131,7 +131,7 @@ static void print_board_model(void) printf("Model: %s\n", model ? model : "Unknown"); } -int show_board_info(void) +static unsigned int get_socinfo(void) { struct regmap *regmap; int nodeoffset, ret; @@ -163,8 +163,20 @@ int show_board_info(void) return 0; } + return socinfo; +} + +int show_board_info(void) +{ + unsigned int socinfo; + /* print board information */ print_board_model(); + + socinfo = get_socinfo(); + if (!socinfo) + return 0; + printf("SoC: Amlogic Meson %s (%s) Revision %x:%x (%x:%x)\n", socinfo_to_soc_id(socinfo), socinfo_to_package_id(socinfo), @@ -175,3 +187,15 @@ int show_board_info(void) return 0; } + +int meson_get_soc_rev(char *buff, size_t buff_len) +{ + unsigned int socinfo; + + socinfo = get_socinfo(); + if (!socinfo) + return -1; + + /* Write SoC info */ + return snprintf(buff, buff_len, "%x", socinfo_to_minor(socinfo)); +} diff --git a/board/amlogic/beelink-s922x/MAINTAINERS b/board/amlogic/beelink-s922x/MAINTAINERS new file mode 100644 index 0000000..7f223df --- /dev/null +++ b/board/amlogic/beelink-s922x/MAINTAINERS @@ -0,0 +1,9 @@ +BEELINK-S922X +M: Christian Hewitt <christianshewitt@gmail.com> +S: Maintained +L: u-boot-amlogic@groups.io +F: board/amlogic/beelink-s922x/ +F: configs/beelink-gtking_defconfig +F: configs/beelink-gtkingpro_defconfig +F: doc/board/amlogic/beelink-gtking.rst +F: doc/board/amlogic/beelink-gtkingpro.rst diff --git a/board/amlogic/beelink-s922x/Makefile b/board/amlogic/beelink-s922x/Makefile new file mode 100644 index 0000000..27b1a74 --- /dev/null +++ b/board/amlogic/beelink-s922x/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2020 BayLibre, SAS +# Author: Neil Armstrong <narmstrong@baylibre.com> + +obj-y := beelink-s922x.o diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c new file mode 100644 index 0000000..dc0d933 --- /dev/null +++ b/board/amlogic/beelink-s922x/beelink-s922x.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include <common.h> +#include <dm.h> +#include <env.h> +#include <init.h> +#include <net.h> +#include <asm/io.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/boot.h> + +#define EFUSE_MAC_OFFSET 20 +#define EFUSE_MAC_SIZE 12 +#define MAC_ADDR_LEN 6 + +int misc_init_r(void) +{ + u8 mac_addr[MAC_ADDR_LEN]; + char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3]; + ssize_t len; + + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) && + meson_get_soc_rev(tmp, sizeof(tmp)) > 0) + env_set("soc_rev", tmp); + + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + efuse_mac_addr, EFUSE_MAC_SIZE); + if (len != EFUSE_MAC_SIZE) + return 0; + + /* MAC is stored in ASCII format, 1bytes = 2characters */ + for (int i = 0; i < 6; i++) { + tmp[0] = efuse_mac_addr[i * 2]; + tmp[1] = efuse_mac_addr[i * 2 + 1]; + tmp[2] = '\0'; + mac_addr[i] = simple_strtoul(tmp, NULL, 16); + } + + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + else + meson_generate_serial_ethaddr(); + } + + return 0; +} diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c index caf7fd6..d995543 100644 --- a/board/amlogic/odroid-n2/odroid-n2.c +++ b/board/amlogic/odroid-n2/odroid-n2.c @@ -10,19 +10,32 @@ #include <init.h> #include <net.h> #include <asm/io.h> +#include <asm/arch/boot.h> #include <asm/arch/sm.h> #include <asm/arch/eth.h> +#include <asm/arch/boot.h> #define EFUSE_MAC_OFFSET 20 #define EFUSE_MAC_SIZE 12 #define MAC_ADDR_LEN 6 +int mmc_get_env_dev(void) +{ + if (meson_get_boot_device() == BOOT_DEVICE_EMMC) + return 1; + return 0; +} + int misc_init_r(void) { u8 mac_addr[MAC_ADDR_LEN]; char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3]; ssize_t len; + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) && + meson_get_soc_rev(tmp, sizeof(tmp)) > 0) + env_set("soc_rev", tmp); + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { diff --git a/board/amlogic/p212/MAINTAINERS b/board/amlogic/p212/MAINTAINERS index cae6994..3d622af 100644 --- a/board/amlogic/p212/MAINTAINERS +++ b/board/amlogic/p212/MAINTAINERS @@ -7,6 +7,7 @@ F: include/configs/p212.h F: configs/khadas-vim_defconfig F: configs/libretech-ac_defconfig F: configs/libretech-cc_defconfig +F: configs/libretech-cc_v2_defconfig F: configs/p212_defconfig F: doc/board/amlogic/p212.rst F: doc/board/amlogic/libretech-ac.rst diff --git a/board/amlogic/q200/MAINTAINERS b/board/amlogic/q200/MAINTAINERS index ec05aa6..ba7c12b 100644 --- a/board/amlogic/q200/MAINTAINERS +++ b/board/amlogic/q200/MAINTAINERS @@ -7,4 +7,6 @@ F: include/configs/q200.h F: configs/khadas-vim2_defconfig F: configs/libretech-s905d-pc_defconfig F: configs/libretech-s912-pc_defconfig +F: configs/wetek-core2_defconfig F: doc/board/amlogic/khadas-vim2.rst +F: doc/board/amlogic/wetek-core2.rst diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c index 09ef39f..7145dbe 100644 --- a/board/amlogic/vim3/vim3.c +++ b/board/amlogic/vim3/vim3.c @@ -10,10 +10,19 @@ #include <init.h> #include <net.h> #include <asm/io.h> +#include <asm/arch/boot.h> #include <asm/arch/eth.h> +#include <asm/arch/sm.h> #include <i2c.h> #include "khadas-mcu.h" +int mmc_get_env_dev(void) +{ + if (meson_get_boot_device() == BOOT_DEVICE_EMMC) + return 2; + return 1; +} + /* * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between @@ -129,9 +138,39 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#define EFUSE_MAC_OFFSET 0 +#define EFUSE_MAC_SIZE 12 +#define MAC_ADDR_LEN 6 + int misc_init_r(void) { + u8 mac_addr[MAC_ADDR_LEN]; + char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3]; + ssize_t len; + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + efuse_mac_addr, EFUSE_MAC_SIZE); + if (len != EFUSE_MAC_SIZE) + return 0; + + /* MAC is stored in ASCII format, 1bytes = 2characters */ + for (int i = 0; i < 6; i++) { + tmp[0] = efuse_mac_addr[i * 2]; + tmp[1] = efuse_mac_addr[i * 2 + 1]; + tmp[2] = '\0'; + mac_addr[i] = simple_strtoul(tmp, NULL, 16); + } + + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + else + meson_generate_serial_ethaddr(); + + eth_env_get_enetaddr("ethaddr", mac_addr); + } + return 0; } diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig new file mode 100644 index 0000000..ea42887 --- /dev/null +++ b/configs/beelink-gtking_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="beelink-s922x" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" beelink" +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig new file mode 100644 index 0000000..5690316 --- /dev/null +++ b/configs/beelink-gtkingpro_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="beelink-s922x" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" beelink" +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 9d7ba72..5d16652 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -29,6 +29,8 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_DM_MMC=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index f37993e..6b13ce0 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -29,6 +29,8 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_DM_MMC=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 171d793..ca61591 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -51,7 +51,7 @@ CONFIG_MESON_GXL_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_POWER_DOMAIN=y -CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_RESET=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index aaab1a2..fb4bf4c 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -38,7 +38,7 @@ CONFIG_MESON_GXL_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_POWER_DOMAIN=y -CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_RESET=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig new file mode 100644 index 0000000..e71f88e --- /dev/null +++ b/configs/libretech-cc_v2_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFF0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_MESON_GXL=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" libretech-cc-v2" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="usb start" +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_KEYBOARD=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ADDR=8 +CONFIG_PHY_MESON_GXL=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PHY=y +CONFIG_MESON_GXL_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index f4e289a..9d4c880 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -46,7 +46,7 @@ CONFIG_MESON_GXL_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_POWER_DOMAIN=y -CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_RESET=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 24e410c..cf600c1 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -45,7 +45,7 @@ CONFIG_MESON_GXL_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_POWER_DOMAIN=y -CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_RESET=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 14e8405..5c02fa1 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -38,7 +38,7 @@ CONFIG_MESON_GXBB_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXBB=y CONFIG_POWER_DOMAIN=y -CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig new file mode 100644 index 0000000..706abff --- /dev/null +++ b/configs/wetek-core2_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_MESON_GXM=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" wetek-core2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_CONSOLE_MUX=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MESON_GXL_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_DM_REGULATOR=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_GX_VPU_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_KEYBOARD=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_GXL=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/doc/board/amlogic/beelink-gtking.rst b/doc/board/amlogic/beelink-gtking.rst new file mode 100644 index 0000000..56ce2cb --- /dev/null +++ b/doc/board/amlogic/beelink-gtking.rst @@ -0,0 +1,115 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Beelink GT-King +========================== + +The Shenzen AZW (Beelink) GT-King is based on the Amlogic W400 reference +board with an S922X-H chip. + +- 4GB LPDDR4 RAM +- 64GB eMMC storage +- 10/100/1000 Base-T Ethernet +- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1) +- HDMI 2.1 video +- S/PDIF optical output +- Analogue audio output +- 1x USB 2.0 port +- 2x USB 3.0 ports +- IR receiver +- 1x micro SD card slot + +Beelink do not provide public schematics, but have been willing +to share them with known distro developers on request. + +U-Boot compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make beelink-gtking_defconfig + $ make + +Image creation +-------------- + +Amlogic does not provide sources for the firmware and for tools needed +to create the bootloader image. Beelink have provided the Amlogic "SDK" +in their forums, but the u-boot sources included result in 2GB RAM being +detected. The following FIPs were generated with newer private sources +and give correct (4GB) RAM detection: + +https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x + +NB: Beelink use a common board config for GT-King, GT-King Pro and the +GS-King-X model, hence the "beelink-s922x" name. + +.. code-block:: bash + + $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip + $ unzip master.zip + $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + $ cp $FIPDIR/* fip/ + $ cp u-boot.bin fip/bl33.bin + + $ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 + $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + $ fip/aml_encrypt_g12b --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --ddrfw8 fip/aml_ddr.fw \ + --level v3 + +and then write the image to SD with: + +.. code-block:: bash + + $ DEV=/dev/your_sd_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/doc/board/amlogic/beelink-gtkingpro.rst b/doc/board/amlogic/beelink-gtkingpro.rst new file mode 100644 index 0000000..d750351 --- /dev/null +++ b/doc/board/amlogic/beelink-gtkingpro.rst @@ -0,0 +1,116 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Beelink GT-King Pro +============================== + +The Shenzen AZW (Beelink) GT-King Pro is based on the Amlogic W400 reference +board with an S922X-H chip. + +- 4GB LPDDR4 RAM +- 64GB eMMC storage +- 10/100/1000 Base-T Ethernet +- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1) +- HDMI 2.1 video +- Analogue audio output +- 1x RS232 port +- 2x USB 2.0 port +- 2x USB 3.0 ports +- IR receiver +- 1x SD card slot +- 1x Power on/off button + +Beelink do not provide public schematics, but have been willing +to share them with known distro developers on request. + +U-Boot compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make beelink-gtkingpro_defconfig + $ make + +Image creation +-------------- + +Amlogic does not provide sources for the firmware and for tools needed +to create the bootloader image. Beelink have provided the Amlogic "SDK" +in their forums, but the u-boot sources included result in 2GB RAM being +detected. The following FIPs were generated with newer private sources +and give correct (4GB) RAM detection: + +https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x + +NB: Beelink use a common board config for GT-King, GT-King Pro and the +GS-King-X model, hence the "beelink-s922x" name. + +.. code-block:: bash + + $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip + $ unzip master.zip + $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + $ cp $FIPDIR/* fip/ + $ cp u-boot.bin fip/bl33.bin + + $ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + $ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 + $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + $ fip/aml_encrypt_g12b --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --ddrfw8 fip/aml_ddr.fw \ + --level v3 + +and then write the image to SD with: + +.. code-block:: bash + + $ DEV=/dev/your_sd_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 9e780ba..275c366 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -10,66 +10,66 @@ An up-do-date matrix is also available on: http://linux-meson.com This matrix concerns the actual source code version. -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 | -| | | S805X | S905D | | S905D2 | A311D | S905D3 | -| | | | | | S905Y2 | | | -+===============================+===========+==============+==============+============+============+=============+==============+ -| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | -| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | -| | P200 | LibreTech-CC | | | | | Odroid-C4 | -| | P201 | LibreTech-AC | | | | | | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Infrared Decoder | No | No | No | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| SPI (CC) | No | No | No | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| NAND | No | No | No | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| CEC | No | No | No | *N/A* | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| Thermal Sensor | No | No | No | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| LCD/LVDS Output | No | *N/A* | No | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ -| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+ ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 | +| | | S805X | S905D | | S905D2 | A311D | S905D3 | +| | | | | | S905Y2 | | | ++===============================+===========+=================+==============+============+============+=============+==============+ +| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | +| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | +| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | +| | P201 | LibreTech-AC v2 | | | | | | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Infrared Decoder | No | No | No | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| SPI (CC) | No | No | No | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| NAND | No | No | No | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| CEC | No | No | No | *N/A* | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| Thermal Sensor | No | No | No | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| LCD/LVDS Output | No | *N/A* | No | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | ++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ Board Documentation ------------------- @@ -77,6 +77,8 @@ Board Documentation .. toctree:: :maxdepth: 1 + beelink-gtking + beelink-gtkingpro khadas-vim2 khadas-vim3l khadas-vim3 @@ -95,4 +97,5 @@ Board Documentation sei510 sei610 u200 + wetek-core2 w400 diff --git a/doc/board/amlogic/libretech-cc.rst b/doc/board/amlogic/libretech-cc.rst index f2e26ca..94c74c5 100644 --- a/doc/board/amlogic/libretech-cc.rst +++ b/doc/board/amlogic/libretech-cc.rst @@ -1,11 +1,13 @@ .. SPDX-License-Identifier: GPL-2.0+ -U-Boot for LibreTech CC -======================= +U-Boot for LibreTech CCs +======================== LibreTech CC is a single board computer manufactured by Libre Technology with the following specifications: +V1: + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz - ARM Mali 450 GPU - 2GB DDR3 SDRAM @@ -15,6 +17,12 @@ with the following specifications: - 4 x USB 2.0 Host - eMMC, microSD - Infrared receiver + - Jack for CVBS and Audio + +V2: + + - Added SPI NOR + - Removed Jack Schematics are available on the manufacturer website. @@ -27,6 +35,8 @@ U-Boot compilation $ make libretech-cc_defconfig $ make +Use libretech-cc_v2_defconfig for v2. + Image creation -------------- @@ -41,7 +51,8 @@ bootloaders: * acs.bin: built from vendor u-boot source These binaries and the tools required below have been collected and prebuilt -for convenience at <https://github.com/BayLibre/u-boot/releases/> +for convenience at <https://github.com/BayLibre/u-boot/releases/>. These +apply to both v1 and v2. Download and extract the libretech-cc release from there, and set FIPDIR to point to the `fip` subdirectory. diff --git a/doc/board/amlogic/wetek-core2.rst b/doc/board/amlogic/wetek-core2.rst new file mode 100644 index 0000000..1012079 --- /dev/null +++ b/doc/board/amlogic/wetek-core2.rst @@ -0,0 +1,96 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Core2 +====================== + +WeTek Core2 is an Android STB based on the Q200 reference design with +the following specifications: + + - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz + - ARM Mali T820 GPU + - 3GB DDR4 SDRAM + - 10/100 Realtek RTL8152 Ethernet (internal USB) + - HDMI 2.0 4K/60Hz display + - 2x USB 2.0 Host, 1x USB 2.0 OTG (internal) + - 32GB eMMC + - microSD + - SDIO Wifi Module, Bluetooth + - Two channel IR receiver + +U-Boot compilation +------------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-none-elf- + $ make wetek-core2_defconfig + $ make + +Image creation +-------------- + +Amlogic does not provide sources for the firmware or the tools needed +to create the bootloader image, and WeTek has not publicly shared the +precompiled FIP binaries. However the public Khadas VIM2 sources also +work with the Core2 box so we can use the Khadas git tree: + +.. code-block:: bash + + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + $ git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot + $ cd vim-u-boot + $ make kvim2_defconfig + $ make + $ export FIPDIR=$PWD/fip + +Go back to mainline U-Boot source tree then: + +.. code-block:: bash + + $ mkdir fip + $ cp $FIPDIR/gxl/bl2.bin fip/ + $ cp $FIPDIR/gxl/acs.bin fip/ + $ cp $FIPDIR/gxl/bl21.bin fip/ + $ cp $FIPDIR/gxl/bl30.bin fip/ + $ cp $FIPDIR/gxl/bl301.bin fip/ + $ cp $FIPDIR/gxl/bl31.img fip/ + $ cp u-boot.bin fip/bl33.bin + $ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + $ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +then write the image to SD with: + +.. code-block:: bash + + $ DEV=/dev/your_sd_device + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index 13a8f49..21db558 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -282,7 +282,7 @@ static int meson_saradc_read_raw_sample(struct meson_saradc_priv *priv, regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val); fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval); if (fifo_chan != channel) { - printf("ADC FIFO entry belongs to channel %d instead of %d\n", + printf("ADC FIFO entry belongs to channel %u instead of %u\n", fifo_chan, channel); return -EINVAL; } @@ -512,8 +512,11 @@ static int meson_saradc_init(struct meson_saradc_priv *priv) * reading the temperature sensor. */ regmap_read(priv->regmap, MESON_SAR_ADC_REG3, ®val); - if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED) - return 0; + if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED) { + regmap_read(priv->regmap, MESON_SAR_ADC_REG3, ®val); + if (regval & MESON_SAR_ADC_REG3_ADC_EN) + return 0; + } meson_saradc_stop_sample_engine(priv); @@ -711,6 +714,8 @@ static const struct udevice_id meson_saradc_ids[] = { .data = (ulong)&gxl_saradc_data }, { .compatible = "amlogic,meson-gxm-saradc", .data = (ulong)&gxl_saradc_data }, + { .compatible = "amlogic,meson-g12a-saradc", + .data = (ulong)&gxl_saradc_data }, { } }; diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index c873d69..7204383 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_CLK_MESON_GX) += gxbb.o obj-$(CONFIG_CLK_MESON_AXG) += axg.o obj-$(CONFIG_CLK_MESON_G12A) += g12a.o +obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c new file mode 100644 index 0000000..0148529 --- /dev/null +++ b/drivers/clk/meson/g12a-ao.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <log.h> +#include <asm/io.h> +#include <clk-uclass.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <dt-bindings/clock/g12a-aoclkc.h> + +#include "clk_meson.h" + +struct meson_clk { + struct regmap *map; +}; + +#define AO_CLK_GATE0 0x4c +#define AO_SAR_CLK 0x90 + +static struct meson_gate gates[] = { + MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 8), + MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 8), +}; + +static int meson_set_gate(struct clk *clk, bool on) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + struct meson_gate *gate; + + if (clk->id >= ARRAY_SIZE(gates)) + return -ENOENT; + + gate = &gates[clk->id]; + + if (gate->reg == 0) + return 0; + + regmap_update_bits(priv->map, gate->reg, + BIT(gate->bit), on ? BIT(gate->bit) : 0); + + return 0; +} + +static int meson_clk_enable(struct clk *clk) +{ + return meson_set_gate(clk, true); +} + +static int meson_clk_disable(struct clk *clk) +{ + return meson_set_gate(clk, false); +} + +static int meson_clk_probe(struct udevice *dev) +{ + struct meson_clk *priv = dev_get_priv(dev); + + priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev))); + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + + return 0; +} + +static struct clk_ops meson_clk_ops = { + .disable = meson_clk_disable, + .enable = meson_clk_enable, +}; + +static const struct udevice_id meson_clk_ids[] = { + { .compatible = "amlogic,meson-g12a-aoclkc" }, + { } +}; + +U_BOOT_DRIVER(meson_clk_axg) = { + .name = "meson_clk_g12a_ao", + .id = UCLASS_CLK, + .of_match = meson_clk_ids, + .priv_auto = sizeof(struct meson_clk), + .ops = &meson_clk_ops, + .probe = meson_clk_probe, +}; diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c index ef8274c..a4d50e7 100644 --- a/drivers/power/domain/meson-ee-pwrc.c +++ b/drivers/power/domain/meson-ee-pwrc.c @@ -13,7 +13,9 @@ #include <syscon.h> #include <reset.h> #include <clk.h> +#include <dt-bindings/power/meson-axg-power.h> #include <dt-bindings/power/meson-g12a-power.h> +#include <dt-bindings/power/meson-gxbb-power.h> #include <dt-bindings/power/meson-sm1-power.h> #include <linux/bitops.h> #include <linux/delay.h> @@ -68,7 +70,7 @@ struct meson_ee_pwrc_domain_data { /* TOP Power Domains */ -static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = { +static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = { .sleep_reg = AO_RTI_GEN_PWR_SLEEP0, .sleep_mask = BIT(8), .iso_reg = AO_RTI_GEN_PWR_SLEEP0, @@ -126,6 +128,17 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = { VPU_HHI_MEMPD(HHI_MEM_PD_REG0), }; +static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_vpu[] = { + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), +}; + +static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), + VPU_MEMPD(HHI_VPU_MEM_PD_REG1), + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), +}; + static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_eth[] = { { HHI_MEM_PD_REG0, GENMASK(3, 2) }, }; @@ -159,6 +172,10 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_ge2d[] = { { HHI_MEM_PD_REG0, GENMASK(25, 18) }, }; +static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_audio[] = { + { HHI_MEM_PD_REG0, GENMASK(5, 4) }, +}; + static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { { HHI_MEM_PD_REG0, GENMASK(5, 4) }, { HHI_AUDIO_MEM_PD_REG0, GENMASK(1, 0) }, @@ -201,11 +218,24 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { static bool pwrc_ee_get_power(struct power_domain *power_domain); static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { - [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu, + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu, pwrc_ee_get_power, 11, 2), [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), }; +static struct meson_ee_pwrc_domain_desc axg_pwrc_domains[] = { + [PWRC_AXG_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, axg_pwrc_mem_vpu, + pwrc_ee_get_power, 5, 2), + [PWRC_AXG_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), + [PWRC_AXG_AUDIO_ID] = MEM_PD("AUDIO", axg_pwrc_mem_audio), +}; + +static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { + [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu, + pwrc_ee_get_power, 12, 2), + [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), +}; + static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = { [PWRC_SM1_VPU_ID] = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu, pwrc_ee_get_power, 11, 2), @@ -369,6 +399,16 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = { .domains = g12a_pwrc_domains, }; +static struct meson_ee_pwrc_domain_data meson_ee_axg_pwrc_data = { + .count = ARRAY_SIZE(axg_pwrc_domains), + .domains = axg_pwrc_domains, +}; + +static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { + .count = ARRAY_SIZE(gxbb_pwrc_domains), + .domains = gxbb_pwrc_domains, +}; + static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = { .count = ARRAY_SIZE(sm1_pwrc_domains), .domains = sm1_pwrc_domains, @@ -380,6 +420,14 @@ static const struct udevice_id meson_ee_pwrc_ids[] = { .data = (unsigned long)&meson_ee_g12a_pwrc_data, }, { + .compatible = "amlogic,meson-gxbb-pwrc", + .data = (unsigned long)&meson_ee_gxbb_pwrc_data, + }, + { + .compatible = "amlogic,meson-axg-pwrc", + .data = (unsigned long)&meson_ee_axg_pwrc_data, + }, + { .compatible = "amlogic,meson-sm1-pwrc", .data = (unsigned long)&meson_ee_sm1_pwrc_data, }, diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index a3f8eeb..d39d9b2 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -449,6 +449,15 @@ config VIDEO_LCD_SSD2828_RESET The reset pin of SSD2828 chip. This takes a string in the format understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. +config VIDEO_LCD_TDO_TL070WSH30 + bool "TDO TL070WSH30 DSI LCD panel support" + depends on DM_VIDEO + select VIDEO_MIPI_DSI + default n + help + Say Y here if you want to enable support for TDO TL070WSH30 + 1024x600 DSI video mode panel. + config VIDEO_LCD_HITACHI_TX18D42VM bool "Hitachi tx18d42vm LVDS LCD panel support" depends on VIDEO diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 76e3914..494e414 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o +obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o obj-${CONFIG_VIDEO_MESON} += meson/ obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o diff --git a/drivers/video/tdo-tl070wsh30.c b/drivers/video/tdo-tl070wsh30.c new file mode 100644 index 0000000..ae9d11f --- /dev/null +++ b/drivers/video/tdo-tl070wsh30.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ +#include <common.h> +#include <backlight.h> +#include <dm.h> +#include <mipi_dsi.h> +#include <panel.h> +#include <asm/gpio.h> +#include <dm/device_compat.h> +#include <linux/delay.h> +#include <power/regulator.h> + +struct tl070wsh30_panel_priv { + struct udevice *reg; + struct udevice *backlight; + struct gpio_desc reset; +}; + +static const struct display_timing default_timing = { + .pixelclock.typ = 47250000, + .hactive.typ = 1024, + .hfront_porch.typ = 46, + .hback_porch.typ = 100, + .hsync_len.typ = 80, + .vactive.typ = 600, + .vfront_porch.typ = 5, + .vback_porch.typ = 20, + .vsync_len.typ = 5, + .flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH, +}; + +static int tl070wsh30_panel_enable_backlight(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); + struct mipi_dsi_device *device = plat->device; + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + int ret; + + ret = mipi_dsi_attach(device); + if (ret < 0) + return ret; + + ret = mipi_dsi_dcs_exit_sleep_mode(device); + if (ret) + return ret; + + mdelay(200); + + ret = mipi_dsi_dcs_set_display_on(device); + if (ret) + return ret; + + mdelay(20); + + ret = backlight_enable(priv->backlight); + if (ret) + return ret; + + return 0; +} + +static int tl070wsh30_panel_get_display_timing(struct udevice *dev, + struct display_timing *timings) +{ + memcpy(timings, &default_timing, sizeof(*timings)); + + return 0; +} + +static int tl070wsh30_panel_ofdata_to_platdata(struct udevice *dev) +{ + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + int ret; + + if (IS_ENABLED(CONFIG_DM_REGULATOR)) { + ret = device_get_supply_regulator(dev, "power-supply", + &priv->reg); + if (ret && ret != -ENOENT) { + dev_err(dev, "Warning: cannot get power supply\n"); + return ret; + } + } + + ret = gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset, + GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "Warning: cannot get reset GPIO\n"); + if (ret != -ENOENT) + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { + dev_err(dev, "Cannot get backlight: ret=%d\n", ret); + return ret; + } + + return 0; +} + +static int tl070wsh30_panel_probe(struct udevice *dev) +{ + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); + int ret; + + if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) { + ret = regulator_set_enable(priv->reg, true); + if (ret) + return ret; + } + + mdelay(10); + + /* reset panel */ + dm_gpio_set_value(&priv->reset, true); + + mdelay(10); + + dm_gpio_set_value(&priv->reset, false); + + /* fill characteristics of DSI data link */ + plat->lanes = 4; + plat->format = MIPI_DSI_FMT_RGB888; + plat->mode_flags = MIPI_DSI_MODE_VIDEO | + MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM; + + return 0; +} + +static const struct panel_ops tl070wsh30_panel_ops = { + .enable_backlight = tl070wsh30_panel_enable_backlight, + .get_display_timing = tl070wsh30_panel_get_display_timing, +}; + +static const struct udevice_id tl070wsh30_panel_ids[] = { + { .compatible = "tdo,tl070wsh30" }, + { } +}; + +U_BOOT_DRIVER(tl070wsh30_panel) = { + .name = "tl070wsh30_panel", + .id = UCLASS_PANEL, + .of_match = tl070wsh30_panel_ids, + .ops = &tl070wsh30_panel_ops, + .ofdata_to_platdata = tl070wsh30_panel_ofdata_to_platdata, + .probe = tl070wsh30_panel_probe, + .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), + .priv_auto_alloc_size = sizeof(struct tl070wsh30_panel_priv), +}; diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h new file mode 100644 index 0000000..e524388 --- /dev/null +++ b/include/dt-bindings/power/meson-axg-power.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef _DT_BINDINGS_MESON_AXG_POWER_H +#define _DT_BINDINGS_MESON_AXG_POWER_H + +#define PWRC_AXG_VPU_ID 0 +#define PWRC_AXG_ETHERNET_MEM_ID 1 +#define PWRC_AXG_AUDIO_ID 2 + +#endif diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h new file mode 100644 index 0000000..1262dac --- /dev/null +++ b/include/dt-bindings/power/meson-gxbb-power.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H +#define _DT_BINDINGS_MESON_GXBB_POWER_H + +#define PWRC_GXBB_VPU_ID 0 +#define PWRC_GXBB_ETHERNET_MEM_ID 1 + +#endif |