diff options
author | Tom Rini <trini@konsulko.com> | 2020-01-03 09:47:22 -0500 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-01-03 09:47:22 -0500 |
commit | 70bd39d72a11544a28adfa4af2e1a8fdce6775ba (patch) | |
tree | 239ac52926655007b8932829c4c1ae54efed628c | |
parent | 4b75aa5aa78768fc81b782ee51d960dfed76f6e1 (diff) | |
parent | 40109f4d7ed114cd473e5528b7b0a9a04be9207e (diff) | |
download | u-boot-70bd39d72a11544a28adfa4af2e1a8fdce6775ba.zip u-boot-70bd39d72a11544a28adfa4af2e1a8fdce6775ba.tar.gz u-boot-70bd39d72a11544a28adfa4af2e1a8fdce6775ba.tar.bz2 |
Merge branch '2020-01-03-master-imports'
- Fixes for host tools with musl C library
- Two fixes for TI K3 platforms
-rw-r--r-- | arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/mach-k3/am6_init.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-k3/common.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-k3/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-k3/j721e_init.c | 1 | ||||
-rw-r--r-- | include/compiler.h | 2 | ||||
-rw-r--r-- | include/u-boot/crc.h | 2 |
7 files changed, 34 insertions, 4 deletions
diff --git a/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi b/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi index 135b619..5ac32a0 100644 --- a/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi +++ b/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ - * This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.1.0 - * This file was generated on 09/06/2019 + * This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.2.0 + * This file was generated on 10/09/2019 */ #define DDRSS_PLL_FHS_CNT 10 @@ -283,7 +283,7 @@ #define DDRSS_CTL_271_DATA 0x1FFF1000 #define DDRSS_CTL_272_DATA 0x01FF0000 #define DDRSS_CTL_273_DATA 0x000101FF -#define DDRSS_CTL_274_DATA 0xFFFF0B00 +#define DDRSS_CTL_274_DATA 0x0FFF0B00 #define DDRSS_CTL_275_DATA 0x01010001 #define DDRSS_CTL_276_DATA 0x01010101 #define DDRSS_CTL_277_DATA 0x01180101 diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 99edcd9..a78ffbb 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -82,6 +82,7 @@ void board_init_f(ulong dummy) ctrl_mmr_unlock(); #ifdef CONFIG_CPU_V7R + disable_linefill_optimization(); setup_k3_mpu_regions(); #endif diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index bf631b7..50f5b81 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -244,3 +244,28 @@ void board_prep_linux(bootm_headers_t *images) CONFIG_SYS_CACHELINE_SIZE)); } #endif + +#ifdef CONFIG_CPU_V7R +void disable_linefill_optimization(void) +{ + u32 actlr; + + /* + * On K3 devices there are 2 conditions where R5F can deadlock: + * 1.When software is performing series of store operations to + * cacheable write back/write allocate memory region and later + * on software execute barrier operation (DSB or DMB). R5F may + * hang at the barrier instruction. + * 2.When software is performing a mix of load and store operations + * within a tight loop and store operations are all writing to + * cacheable write back/write allocates memory regions, R5F may + * hang at one of the load instruction. + * + * To avoid the above two conditions disable linefill optimization + * inside Cortex R5F. + */ + asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr)); + actlr |= (1 << 13); /* Set DLFO bit */ + asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr)); +} +#endif diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 8f9a023..35d1609 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -16,3 +16,4 @@ void setup_k3_mpu_regions(void); int early_console_init(void); +void disable_linefill_optimization(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index d0bf86a..4758739 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -87,6 +87,7 @@ void board_init_f(ulong dummy) ctrl_mmr_unlock(); #ifdef CONFIG_CPU_V7R + disable_linefill_optimization(); setup_k3_mpu_regions(); #endif diff --git a/include/compiler.h b/include/compiler.h index 29507f9..90372f2 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -46,7 +46,6 @@ # include <byteswap.h> #elif defined(__MACH__) || defined(__FreeBSD__) # include <machine/endian.h> -typedef unsigned long ulong; #endif #ifdef __FreeBSD__ # include <sys/endian.h> /* htole32 and friends */ @@ -66,6 +65,7 @@ typedef uint8_t __u8; typedef uint16_t __u16; typedef uint32_t __u32; typedef unsigned int uint; +typedef unsigned long ulong; #define uswap_16(x) \ ((((x) & 0xff00) >> 8) | \ diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h index 1086d21..bfd477f 100644 --- a/include/u-boot/crc.h +++ b/include/u-boot/crc.h @@ -8,6 +8,8 @@ #ifndef _UBOOT_CRC_H #define _UBOOT_CRC_H +#include <compiler.h> /* 'uint*' definitions */ + /** * crc8() - Calculate and return CRC-8 of the data * |