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author | Tom Rini <trini@konsulko.com> | 2019-05-22 12:58:58 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2019-05-22 12:58:58 -0400 |
commit | 40920bdecc4e1b7096de6f546d7b5c2185554ba6 (patch) | |
tree | aa3c93ff5606eaed9c93618c2691697b0da483cc | |
parent | 7e090b466c5ba874d31c1bf22c3a130d516cdc32 (diff) | |
parent | ee730a7cd2afe445e53e92b5c37396a5b118f7af (diff) | |
download | u-boot-40920bdecc4e1b7096de6f546d7b5c2185554ba6.zip u-boot-40920bdecc4e1b7096de6f546d7b5c2185554ba6.tar.gz u-boot-40920bdecc4e1b7096de6f546d7b5c2185554ba6.tar.bz2 |
Merge tag 'dm-pull-22may19' of git://git.denx.de/u-boot-dm
Various DM fixes
Addition of ofnode_get_addr_size_index()
-rw-r--r-- | common/fdt_support.c | 31 | ||||
-rw-r--r-- | drivers/core/ofnode.c | 15 | ||||
-rw-r--r-- | drivers/core/root.c | 2 | ||||
-rw-r--r-- | drivers/misc/Kconfig | 72 | ||||
-rw-r--r-- | drivers/misc/Makefile | 8 | ||||
-rw-r--r-- | include/dm/ofnode.h | 16 | ||||
-rw-r--r-- | include/fdtdec.h | 24 | ||||
-rw-r--r-- | include/stdint.h | 7 | ||||
-rw-r--r-- | lib/fdtdec.c | 8 | ||||
-rw-r--r-- | lib/fdtdec_test.c | 8 | ||||
-rw-r--r-- | tools/buildman/builder.py | 7 |
11 files changed, 151 insertions, 47 deletions
diff --git a/common/fdt_support.c b/common/fdt_support.c index 4e7cf6e..f31e9b0 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -722,11 +722,6 @@ int fdt_increase_size(void *fdt, int add_len) #include <jffs2/load_kernel.h> #include <mtd_node.h> -struct reg_cell { - unsigned int r0; - unsigned int r1; -}; - static int fdt_del_subnodes(const void *blob, int parent_offset) { int off, ndepth; @@ -785,9 +780,9 @@ int fdt_node_set_part_info(void *blob, int parent_offset, { struct list_head *pentry; struct part_info *part; - struct reg_cell cell; int off, ndepth = 0; int part_num, ret; + int sizecell; char buf[64]; ret = fdt_del_partitions(blob, parent_offset); @@ -795,6 +790,13 @@ int fdt_node_set_part_info(void *blob, int parent_offset, return ret; /* + * Check if size/address is 1 or 2 cells. + * We assume #address-cells and #size-cells have same value. + */ + sizecell = fdt_getprop_u32_default_node(blob, parent_offset, + 0, "#size-cells", 1); + + /* * Check if it is nand {}; subnode, adjust * the offset in this case */ @@ -842,10 +844,21 @@ add_ro: goto err_prop; } - cell.r0 = cpu_to_fdt32(part->offset); - cell.r1 = cpu_to_fdt32(part->size); add_reg: - ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell)); + if (sizecell == 2) { + ret = fdt_setprop_u64(blob, newoff, + "reg", part->offset); + if (!ret) + ret = fdt_appendprop_u64(blob, newoff, + "reg", part->size); + } else { + ret = fdt_setprop_u32(blob, newoff, + "reg", part->offset); + if (!ret) + ret = fdt_appendprop_u32(blob, newoff, + "reg", part->size); + } + if (ret == -FDT_ERR_NOSPACE) { ret = fdt_increase_size(blob, 512); if (!ret) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index cc0c031..c72c6e2 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -39,7 +39,7 @@ int ofnode_read_u32(ofnode node, const char *propname, u32 *outp) return 0; } -int ofnode_read_u32_default(ofnode node, const char *propname, u32 def) +u32 ofnode_read_u32_default(ofnode node, const char *propname, u32 def) { assert(ofnode_valid(node)); ofnode_read_u32(node, propname, &def); @@ -251,7 +251,7 @@ int ofnode_read_size(ofnode node, const char *propname) return -EINVAL; } -fdt_addr_t ofnode_get_addr_index(ofnode node, int index) +fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, fdt_size_t *size) { int na, ns; @@ -260,7 +260,7 @@ fdt_addr_t ofnode_get_addr_index(ofnode node, int index) uint flags; prop_val = of_get_address(ofnode_to_np(node), index, - NULL, &flags); + (u64 *)size, &flags); if (!prop_val) return FDT_ADDR_T_NONE; @@ -277,12 +277,19 @@ fdt_addr_t ofnode_get_addr_index(ofnode node, int index) ns = ofnode_read_simple_size_cells(ofnode_get_parent(node)); return fdtdec_get_addr_size_fixed(gd->fdt_blob, ofnode_to_offset(node), "reg", - index, na, ns, NULL, true); + index, na, ns, size, true); } return FDT_ADDR_T_NONE; } +fdt_addr_t ofnode_get_addr_index(ofnode node, int index) +{ + fdt_size_t size; + + return ofnode_get_addr_size_index(node, index, &size); +} + fdt_addr_t ofnode_get_addr(ofnode node) { return ofnode_get_addr_index(node, 0); diff --git a/drivers/core/root.c b/drivers/core/root.c index 8fa0966..aa5ca40 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -342,7 +342,7 @@ int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only) { int ret; - ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only); + ret = dm_scan_fdt(blob, pre_reloc_only); if (ret) { debug("dm_scan_fdt() failed: %d\n", ret); return ret; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 0e645f5..cb8b5c0 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -13,6 +13,24 @@ config MISC set of generic read, write and ioctl methods may be used to access the device. +config SPL_MISC + bool "Enable Driver Model for Misc drivers in SPL" + depends on SPL_DM + help + Enable driver model for miscellaneous devices. This class is + used only for those do not fit other more general classes. A + set of generic read, write and ioctl methods may be used to + access the device. + +config TPL_MISC + bool "Enable Driver Model for Misc drivers in TPL" + depends on TPL_DM + help + Enable driver model for miscellaneous devices. This class is + used only for those do not fit other more general classes. A + set of generic read, write and ioctl methods may be used to + access the device. + config ALTERA_SYSID bool "Altera Sysid support" depends on MISC @@ -68,6 +86,24 @@ config CROS_EC control access to the battery and main PMIC depending on the device. You can use the 'crosec' command to access it. +config SPL_CROS_EC + bool "Enable Chrome OS EC in SPL" + help + Enable access to the Chrome OS EC in SPL. This is a separate + microcontroller typically available on a SPI bus on Chromebooks. It + provides access to the keyboard, some internal storage and may + control access to the battery and main PMIC depending on the + device. You can use the 'crosec' command to access it. + +config TPL_CROS_EC + bool "Enable Chrome OS EC in TPL" + help + Enable access to the Chrome OS EC in TPL. This is a separate + microcontroller typically available on a SPI bus on Chromebooks. It + provides access to the keyboard, some internal storage and may + control access to the battery and main PMIC depending on the + device. You can use the 'crosec' command to access it. + config CROS_EC_I2C bool "Enable Chrome OS EC I2C driver" depends on CROS_EC @@ -86,6 +122,24 @@ config CROS_EC_LPC through a legacy port interface, so on x86 machines the main function of the EC is power and thermal management. +config SPL_CROS_EC_LPC + bool "Enable Chrome OS EC LPC driver in SPL" + depends on CROS_EC + help + Enable I2C access to the Chrome OS EC. This is used on x86 + Chromebooks such as link and falco. The keyboard is provided + through a legacy port interface, so on x86 machines the main + function of the EC is power and thermal management. + +config TPL_CROS_EC_LPC + bool "Enable Chrome OS EC LPC driver in TPL" + depends on CROS_EC + help + Enable I2C access to the Chrome OS EC. This is used on x86 + Chromebooks such as link and falco. The keyboard is provided + through a legacy port interface, so on x86 machines the main + function of the EC is power and thermal management. + config CROS_EC_SANDBOX bool "Enable Chrome OS EC sandbox driver" depends on CROS_EC && SANDBOX @@ -95,6 +149,24 @@ config CROS_EC_SANDBOX EC flash read/write/erase support and a few other things. It is enough to perform a Chrome OS verified boot on sandbox. +config SPL_CROS_EC_SANDBOX + bool "Enable Chrome OS EC sandbox driver in SPL" + depends on SPL_CROS_EC && SANDBOX + help + Enable a sandbox emulation of the Chrome OS EC in SPL. This supports + keyboard (use the -l flag to enable the LCD), verified boot context, + EC flash read/write/erase support and a few other things. It is + enough to perform a Chrome OS verified boot on sandbox. + +config TPL_CROS_EC_SANDBOX + bool "Enable Chrome OS EC sandbox driver in TPL" + depends on TPL_CROS_EC && SANDBOX + help + Enable a sandbox emulation of the Chrome OS EC in TPL. This supports + keyboard (use the -l flag to enable the LCD), verified boot context, + EC flash read/write/erase support and a few other things. It is + enough to perform a Chrome OS verified boot on sandbox. + config CROS_EC_SPI bool "Enable Chrome OS EC SPI driver" depends on CROS_EC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 6bdf505..509c588 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -4,11 +4,13 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-$(CONFIG_MISC) += misc-uclass.o + +obj-$(CONFIG_$(SPL_TPL_)CROS_EC) += cros_ec.o +obj-$(CONFIG_$(SPL_TPL_)CROS_EC_SANDBOX) += cros_ec_sandbox.o +obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o + ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_CROS_EC) += cros_ec.o -obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o -obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o endif diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index d206ee2..4ab2ae1 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -224,7 +224,7 @@ static inline int ofnode_read_s32(ofnode node, const char *propname, * @def: default value to return if the property has no value * @return property value, or @def if not found */ -int ofnode_read_u32_default(ofnode ref, const char *propname, u32 def); +u32 ofnode_read_u32_default(ofnode ref, const char *propname, u32 def); /** * ofnode_read_s32_default() - Read a 32-bit integer from a property @@ -355,6 +355,20 @@ ofnode ofnode_get_by_phandle(uint phandle); int ofnode_read_size(ofnode node, const char *propname); /** + * ofnode_get_addr_size_index() - get an address/size from a node + * based on index + * + * This reads the register address/size from a node based on index + * + * @node: node to read from + * @index: Index of address to read (0 for first) + * @size: Pointer to size of the address + * @return address, or FDT_ADDR_T_NONE if not present or invalid + */ +phys_addr_t ofnode_get_addr_size_index(ofnode node, int index, + fdt_size_t *size); + +/** * ofnode_get_addr_index() - get an address from a node * * This reads the register address from a node diff --git a/include/fdtdec.h b/include/fdtdec.h index 110aa6a..fa8e34f 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -24,30 +24,6 @@ typedef phys_addr_t fdt_addr_t; typedef phys_size_t fdt_size_t; -static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) -{ - if (upper) -#ifdef CONFIG_PHYS_64BIT - *upper = addr >> 32; -#else - *upper = 0; -#endif - - return addr; -} - -static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) -{ - if (upper) -#ifdef CONFIG_PHYS_64BIT - *upper = size >> 32; -#else - *upper = 0; -#endif - - return size; -} - #ifdef CONFIG_PHYS_64BIT #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) diff --git a/include/stdint.h b/include/stdint.h new file mode 100644 index 0000000..2e126d1 --- /dev/null +++ b/include/stdint.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Dummy file to allow libraries linked with U-Boot to include stdint.h without + * getting the system version. + * + * U-Boot uses linux types (linux/types.h) so does not make use of stdint.h + */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index fea44a9..d0ba888 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, fdt32_t cells[4] = {}, *ptr = cells; uint32_t upper, lower, phandle; int parent, node, na, ns, err; + fdt_size_t size; char name[64]; /* create an empty /reserved-memory node if one doesn't exist */ @@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, * Unpack the start address and generate the name of the new node * base on the basename and the unit-address. */ - lower = fdt_addr_unpack(carveout->start, &upper); + upper = upper_32_bits(carveout->start); + lower = lower_32_bits(carveout->start); if (na > 1 && upper > 0) snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, @@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, *ptr++ = cpu_to_fdt32(lower); /* store one or two size cells */ - lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); + size = carveout->end - carveout->start + 1; + upper = upper_32_bits(size); + lower = lower_32_bits(size); if (ns > 1) *ptr++ = cpu_to_fdt32(upper); diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c index f6defe1..1f4f270 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) }; fdt32_t cells[4], *ptr = cells; uint32_t upper, lower; + fdt_size_t size; char name[32]; int offset; /* store one or two address cells */ - lower = fdt_addr_unpack(carveout.start, &upper); + upper = upper_32_bits(carveout.start); + lower = lower_32_bits(carveout.start); if (na > 1 && upper > 0) snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, @@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) *ptr++ = cpu_to_fdt32(lower); /* store one or two size cells */ - lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); + size = carveout.end - carveout.start + 1; + upper = upper_32_bits(size); + lower = lower_32_bits(size); if (ns > 1) *ptr++ = cpu_to_fdt32(upper); diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py index 6a6c83b..fbb2366 100644 --- a/tools/buildman/builder.py +++ b/tools/buildman/builder.py @@ -673,7 +673,12 @@ class Builder: environment = {} if os.path.exists(done_file): with open(done_file, 'r') as fd: - return_code = int(fd.readline()) + try: + return_code = int(fd.readline()) + except ValueError: + # The file may be empty due to running out of disk space. + # Try a rebuild + return_code = 1 err_lines = [] err_file = self.GetErrFile(commit_upto, target) if os.path.exists(err_file): |