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authorTom Rini <trini@konsulko.com>2021-08-21 13:50:16 -0400
committerTom Rini <trini@konsulko.com>2021-08-31 17:46:37 -0400
commit222d22a39a459f8982778bc28fad6fc4acc2e3a7 (patch)
tree3eeb2d2609de7c5d96025e8be40a01d6d476ba2b
parentf66a3fde38d6cece164ecb36f021c74c4aac2a9d (diff)
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ddr: Migrate DDR_SPD to Kconfig
Move the symbol that controls building some JEDEC SPD support functions to Kconfig. This is required on the TI keystone 2 platforms and very frequently (but not always) used on large number of Freescale/NXP platforms, so use imply there. Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--drivers/ddr/Kconfig6
-rw-r--r--drivers/ddr/fsl/Kconfig4
3 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 30fb7b6..c97acca 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -729,6 +729,7 @@ config ARCH_KEYSTONE
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
+ select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index d4b393d..0b767ac 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -1,2 +1,8 @@
+config DDR_SPD
+ bool "JEDEC Serial Presence Detect (SPD) support"
+ help
+ For memory controllers that can utilize it, add enable support for
+ using the JEDEC SDP standard.
+
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 8246f62..6461a54 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -116,22 +116,26 @@ choice
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
depends on SYS_FSL_HAS_DDR4
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN4
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on SYS_FSL_HAS_DDR3
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN3 if PPC
select SYS_FSL_DDRC_ARM_GEN3 if ARM
config SYS_FSL_DDR2
bool "Freescale DDR2 controller"
depends on SYS_FSL_HAS_DDR2
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
config SYS_FSL_DDR1
bool "Freescale DDR1 controller"
depends on SYS_FSL_HAS_DDR1
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN1
endchoice