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authorTom Rini <trini@konsulko.com>2024-06-14 10:37:53 -0600
committerTom Rini <trini@konsulko.com>2024-06-14 10:37:53 -0600
commit1811ed5de80a143d3a5194424b14e99ad8459a0b (patch)
treeb3bc0ef9bce129713bfefd10a6176e3d708aca21
parent2248c96ea1cf0b65377040d9f87ce7d8cf534c63 (diff)
parent09d63e647a0eee024b493ad1d0e0d4a7a65ae500 (diff)
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Merge tag 'u-boot-imx-master-20240614' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/21125 - Update imx8mn_s2 DDR initialization to fix USB boot.
-rw-r--r--board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c23
-rw-r--r--board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c14
2 files changed, 21 insertions, 16 deletions
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
index 0da6418..33452d2 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_256m.c
@@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
- { 0x3d400064, 0x610040 },
+ { 0x3d400064, 0x300040 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
- { 0x3d4000e0, 0x180000 },
+ { 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -67,10 +67,10 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400498, 0x7ff },
{ 0x3d40049c, 0xe00 },
{ 0x3d4004a0, 0x7ff },
- { 0x3d402064, 0x28001b },
+ { 0x3d402064, 0x14001b },
{ 0x3d4020dc, 0x12200004 },
- { 0x3d4020e0, 0x0 },
- { 0x3d402100, 0x7090b07 },
+ { 0x3d4020e0, 0x400000 },
+ { 0x3d402100, 0x7090507 },
{ 0x3d402104, 0x20209 },
{ 0x3d402108, 0x3030407 },
{ 0x3d40210c, 0x2006 },
@@ -680,12 +680,13 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x31f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1d70 },
{ 0x54030, 0x4 },
- { 0x54031, 0x18 },
+ { 0x54031, 0x58 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -700,11 +701,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
+ { 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -886,11 +889,11 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
- { 0x2000b, 0x32 },
+ { 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
+ { 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },
diff --git a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
index f845395..ca14a47 100644
--- a/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
+++ b/board/bsh/imx8mn_smm_s2/ddr3l_timing_512m.c
@@ -18,15 +18,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x20 },
{ 0x3d400000, 0xa1040001 },
- { 0x3d400064, 0x610068 },
+ { 0x3d400064, 0x300068 },
{ 0x3d4000d0, 0xc00200c5 },
{ 0x3d4000d4, 0x1000b },
{ 0x3d4000dc, 0x1d700004 },
- { 0x3d4000e0, 0x180000 },
+ { 0x3d4000e0, 0x580000 },
{ 0x3d4000e4, 0x90000 },
- { 0x3d4000f0, 0x0 },
+ { 0x3d4000f0, 0x2 },
{ 0x3d4000f4, 0xee5 },
- { 0x3d400100, 0xc101b0e },
+ { 0x3d400100, 0xc100d0e },
{ 0x3d400104, 0x30314 },
{ 0x3d400108, 0x4060509 },
{ 0x3d40010c, 0x2006 },
@@ -700,11 +700,13 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0x54006, 0x140 },
{ 0x54007, 0x1000 },
{ 0x54008, 0x101 },
+ { 0x54009, 0x200 },
{ 0x5400b, 0x21f },
{ 0x5400c, 0xc8 },
{ 0x54012, 0x1 },
{ 0x5402f, 0x1220 },
{ 0x54030, 0x4 },
+ { 0x54031, 0x40 },
{ 0x5403a, 0x1323 },
{ 0xd0000, 0x1 },
};
@@ -886,11 +888,11 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
{ 0x90026, 0x2b },
- { 0x2000b, 0x32 },
+ { 0x2000b, 0x1c2 },
{ 0x2000c, 0x64 },
{ 0x2000d, 0x3e8 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
+ { 0x12000b, 0xbb },
{ 0x12000c, 0x26 },
{ 0x12000d, 0x1a1 },
{ 0x12000e, 0x10 },