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| author | York Sun <york.sun@nxp.com> | 2016-12-02 10:44:34 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-12-02 12:38:42 -0800 |
| commit | 05cb79a72cc3b99a0238e8b8eeec6d3ffd8b0674 (patch) | |
| tree | fcfed5f61d3f411ad115f7d6372af8336df6cdb9 | |
| parent | c6e6bda3a873fe036b30746195b59339d10e3cdf (diff) | |
| download | u-boot-05cb79a72cc3b99a0238e8b8eeec6d3ffd8b0674.zip u-boot-05cb79a72cc3b99a0238e8b8eeec6d3ffd8b0674.tar.gz u-boot-05cb79a72cc3b99a0238e8b8eeec6d3ffd8b0674.tar.bz2 | |
powerpc: mpc85xx: Move CONFIG_FSL_LAW to Kconfig
Some header files have this macro defined conditionally and
redefined unconditionally. Remove all existing definitions.
Signed-off-by: York Sun <york.sun@nxp.com>
40 files changed, 42 insertions, 68 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f782695..ec58cd1 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -323,117 +323,159 @@ endchoice config ARCH_B4420 bool + select FSL_LAW config ARCH_B4860 bool + select FSL_LAW config ARCH_BSC9131 bool + select FSL_LAW config ARCH_BSC9132 bool + select FSL_LAW config ARCH_C29X bool + select FSL_LAW config ARCH_MPC8536 bool + select FSL_LAW config ARCH_MPC8540 bool + select FSL_LAW config ARCH_MPC8541 bool + select FSL_LAW config ARCH_MPC8544 bool + select FSL_LAW config ARCH_MPC8548 bool + select FSL_LAW config ARCH_MPC8555 bool + select FSL_LAW config ARCH_MPC8560 bool + select FSL_LAW config ARCH_MPC8568 bool + select FSL_LAW config ARCH_MPC8569 bool + select FSL_LAW config ARCH_MPC8572 bool + select FSL_LAW config ARCH_P1010 bool + select FSL_LAW config ARCH_P1011 bool + select FSL_LAW config ARCH_P1020 bool + select FSL_LAW config ARCH_P1021 bool + select FSL_LAW config ARCH_P1022 bool + select FSL_LAW config ARCH_P1023 bool + select FSL_LAW config ARCH_P1024 bool + select FSL_LAW config ARCH_P1025 bool + select FSL_LAW config ARCH_P2020 bool + select FSL_LAW config ARCH_P2041 bool + select FSL_LAW config ARCH_P3041 bool + select FSL_LAW config ARCH_P4080 bool + select FSL_LAW config ARCH_P5020 bool + select FSL_LAW config ARCH_P5040 bool + select FSL_LAW config ARCH_QEMU_E500 bool config ARCH_T1023 bool + select FSL_LAW config ARCH_T1024 bool + select FSL_LAW config ARCH_T1040 bool + select FSL_LAW config ARCH_T1042 bool + select FSL_LAW config ARCH_T2080 bool + select FSL_LAW config ARCH_T2081 bool + select FSL_LAW config ARCH_T4160 bool + select FSL_LAW config ARCH_T4240 bool + select FSL_LAW + +config FSL_LAW + bool + help + Use Freescale common code for Local Access Window config SECURE_BOOT bool "Secure Boot" diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index cd4333f..7d3ebf3 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -19,7 +19,6 @@ #else #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -80,8 +79,6 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ - /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x77 diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index aaf7106..eecbd75 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -51,7 +51,6 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_TSEC_ENET #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 8eee738..5cfdbb2 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -103,7 +103,6 @@ #define CONFIG_DOS_PARTITION #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #define CONFIG_TSEC_ENET /* ethernet */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 39eefb4..79cf09e 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -102,7 +102,6 @@ #define CONFIG_DOS_PARTITION #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_TSEC_ENET #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 446303d..d8f7961 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -51,7 +51,6 @@ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 54932fd..9fd7109 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ /* * sysclk for MPC85xx diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 29bca4c..2dad188 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -25,8 +25,6 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - #define CONFIG_FSL_VIA #ifndef __ASSEMBLY__ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6c17a3b..4bab893 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -28,8 +28,6 @@ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 310c070..41ba9e7 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -35,7 +35,6 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_VIA diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 3cf8d97..0f035dd 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_VIA diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 641521c..343287e 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -34,7 +34,6 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ /* diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index e7adb17..3cddb5f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -28,7 +28,6 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_QE /* Enable QE */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 91f0104..bd52054 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_QE /* Enable QE */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index e134560..bffcad1 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -39,8 +39,6 @@ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3ced88d..78e0064 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -19,7 +19,6 @@ #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 @@ -45,7 +44,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 @@ -201,7 +199,6 @@ #define CONFIG_DOS_PARTITION #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_TSEC_ENET #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 6f07080..81e8c29 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -15,7 +15,6 @@ #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 @@ -36,7 +35,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 @@ -115,8 +113,6 @@ #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 5061286..d5728a1 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -35,7 +35,6 @@ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 417bfd3..91e5f8b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -58,8 +58,6 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_DPAA_RMAN /* RMan */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 3c0a0c9..fda83d2 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #define CONFIG_DEEP_SLEEP @@ -42,7 +41,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e2aea8b..054b323 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ @@ -45,7 +44,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x30001000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index ba1c38b..00676dd 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -69,8 +69,6 @@ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index ed568f3..7521dd0 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -24,7 +24,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x30001000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -180,8 +179,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #ifndef CONFIG_SYS_NO_FLASH diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 17176f4..b984fcd 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_RAMBOOT_PBL @@ -49,7 +48,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index bca6a5b..e013e72 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_RAMBOOT_PBL @@ -42,7 +41,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 1d18316..d90fb35 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -24,7 +24,6 @@ #else #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6c743e3..fd5dbc5 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -23,7 +23,6 @@ #else #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -85,8 +84,6 @@ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE /* diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 1163b0d..c194ec7 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -124,8 +124,6 @@ #define CONFIG_MP -#define CONFIG_FSL_LAW - #define CONFIG_ENV_OVERWRITE #define CONFIG_CMD_SATA diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index b824e3b..971549e 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENABLE_36BIT_PHYS -#define CONFIG_FSL_LAW /* Use common FSL init code */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_ADDR_MAP diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 67a5034..c4d172d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -69,8 +69,6 @@ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 13e4690..45caf9f 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -59,8 +59,6 @@ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index fad8865..affcb48 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -46,8 +46,6 @@ #define CONFIG_SYS_DPAA_RMAN /* RMan */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - /* Environment in SPI Flash */ #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 77f3d81..c20ef5e 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -174,7 +174,6 @@ #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 @@ -195,7 +194,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 @@ -274,7 +272,6 @@ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index c122f8e..5ff2e35 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -52,7 +52,6 @@ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 008781e..617be27 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -69,8 +69,6 @@ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - /* * Below assumes that CCB:SYSCLK remains unchanged at 6:1 via SW2:[1-4] */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c697f63..81afed0 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -31,8 +31,6 @@ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - /* * Only possible on E500 Version 2 or newer cores. */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 0aba18b..e2b1171 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -40,8 +40,6 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE /* diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 7f6927b..fee8c34 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -30,7 +30,6 @@ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ /* * DDR config diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a6bdffc..7e811d5 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -31,7 +31,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_ELBC 1 /* diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index f12f8fe..4dfb79d 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -32,7 +32,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_ELBC 1 /* |