aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChin Liang See <clsee@altera.com>2014-06-10 01:11:04 -0500
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-05 00:24:18 +0200
commit05b884b5cd56478ba617b5c6a0538efe590fe098 (patch)
tree1c3b2e2fca02760cba269f7af7be8968c010f96c
parentd8c67dc6e1f861bcf6e61c0b67782fbac2e0a010 (diff)
downloadu-boot-05b884b5cd56478ba617b5c6a0538efe590fe098.zip
u-boot-05b884b5cd56478ba617b5c6a0538efe590fe098.tar.gz
u-boot-05b884b5cd56478ba617b5c6a0538efe590fe098.tar.bz2
socfpga: Adding DesignWare watchdog support
To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
-rw-r--r--arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h1
-rw-r--r--include/configs/socfpga_cyclone5.h14
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index f564046..f2ecbbd 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -11,6 +11,7 @@
#define SOCFPGA_UART0_ADDRESS 0xffc02000
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
+#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 0254249..34291c7 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -206,6 +206,17 @@
#define CONFIG_ENV_IS_NOWHERE
/*
+ * L4 Watchdog
+ */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
+#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
+/* Clocks source frequency to watchdog timer */
+#define CONFIG_DW_WDT_CLOCK_KHZ 25000
+
+
+/*
* SPL "Second Program Loader" aka Initial Software
*/
@@ -237,4 +248,7 @@
/* Support for lib/libgeneric.o in SPL binary */
#define CONFIG_SPL_LIBGENERIC_SUPPORT
+/* Support for watchdog */
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+
#endif /* __CONFIG_H */