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| author | Randolph <randolph@andestech.com> | 2023-10-12 14:35:09 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-10-19 17:29:33 +0800 |
| commit | 03a4504659bf8b0a1945a79696ae9a2b7ca4938a (patch) | |
| tree | ee86dda6d9560476fed42001ba0d917bfe1d7456 | |
| parent | fe192679ef269585606b7c95fa587579b908ef0d (diff) | |
| download | u-boot-03a4504659bf8b0a1945a79696ae9a2b7ca4938a.zip u-boot-03a4504659bf8b0a1945a79696ae9a2b7ca4938a.tar.gz u-boot-03a4504659bf8b0a1945a79696ae9a2b7ca4938a.tar.bz2 | |
riscv: spl: andes: Move the DTB in front of kernel
Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.
Moving the DTB in front of the kernel can avoid this error.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
| -rw-r--r-- | board/AndesTech/ae350/ae350.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c index 1c2288b..d78ee40 100644 --- a/board/AndesTech/ae350/ae350.c +++ b/board/AndesTech/ae350/ae350.c @@ -19,6 +19,8 @@ #include <fdtdec.h> #include <dm.h> #include <spl.h> +#include <mapmem.h> +#include <hang.h> DECLARE_GLOBAL_DATA_PTR; @@ -26,6 +28,29 @@ DECLARE_GLOBAL_DATA_PTR; * Miscellaneous platform dependent initializations */ +#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) +#define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x100000) +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + /* + * Originally, u-boot-spl will place DTB directly after the kernel, + * but the size of the kernel did not include the BSS section, which + * means u-boot-spl will place the DTB in the kernel BSS section + * causing the DTB to be cleared by kernel BSS initializtion. + * Moving DTB in front of the kernel can avoid the error. + */ + if (ANDES_SPL_FDT_ADDR < 0) { + printf("%s: CONFIG_TEXT_BASE needs to be larger than 0x100000\n", + __func__); + hang(); + } + + memcpy((void *)ANDES_SPL_FDT_ADDR, spl_image->fdt_addr, + fdt_totalsize(spl_image->fdt_addr)); + spl_image->fdt_addr = map_sysmem(ANDES_SPL_FDT_ADDR, 0); +} +#endif + int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; |