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2025-03-07platform: Identify correct bmc platform based on bmc hw versionHEADmasterMahesh Salgaonkar1-1/+13
At the moment the generic platform sets bmc_generic() as bmc platform which does not have any support to initialize the flash and hence it fails to load petitboot kernel. [ 583.105000325,4] FLASH: Failed to load VERSION data [ 583.105490257,5] INIT: Waiting for kernel... [ 583.105523156,5] INIT: platform wait for kernel load failed [ 583.105555219,5] INIT: Assuming kernel at 0x20000000 [ 583.105589925,3] INIT: ELF header not found. Assuming raw binary. [...] [ 583.299682673,5] INIT: Starting kernel at 0x20000000, fdt at 0x30a44eb0 1274673 bytes [ 583.344432417,3] *********************************************** [ 583.344490230,3] Fatal Exception 0x800 at 0000000020000000 MSR 9000000000000000 [ 583.344535875,3] CFAR : 0000000030022948 MSR : 9000000000000000 [ 583.344578019,3] SRR0 : 0000000020000000 SRR1 : 9000000000000000 [ 583.344620242,3] HSRR0: 0000000020000000 HSRR1: 9000000000000000 OPAL builds the device tree for BMC based system using HDAT. It populates bmc/compatible node with bmc hw version e.g. "ibm,ast2600,openbmc". Use that to identify proper BMC hw board and initialize BMC platform with proper backend. This allows opal to successfully load and boot into petitboot kernel. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07iohub: Add HUB ID for everest systemsAditya Gupta2-0/+5
Everest's hub id is 0x52, which OPAL earlier didn't recognise: [ 574.179390090,6] CEC: HUB FRU 0 is CPU Card [ 574.179430286,6] CEC: 2 chips in FRU [ 574.179464930,7] CEC: IO Hub Chip #0 OK [ 574.179497312,7] CEC: PChip: 0 HUB ID: 0052 [EC=0x20] Hub#=0) [ 574.179543358,3] CEC: Hub ID 0x0052 unsupported ! <-------- Due to not recognising the HUB id, it doesn't initialise the PCI slots. Define 0x52 as Everest's hub id, so OPAL initialises PCIe slots also for Everest Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07external/mambo: skiboot.tcl add Power11 configMahesh Salgaonkar1-0/+28
Setup skiboot.tcl with Power11 config to be boot on Power11 mambo. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07plat/qemu: add support for Power11 platformAditya Gupta2-2/+26
Add support for QEMU simulator for Power11 when it starts supporting "qemu,powernv11" machines. Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07cpufeatures: Add Power11 supportMahesh Salgaonkar1-27/+35
Update the cpu_feature structure to support Power11. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07Initial Power11 enablementMahesh Salgaonkar36-63/+158
Detect Power11 PVR and use P10 code path. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> [adityag: Add Power11 chiptod device node] [adityag: Fix the proc_gen checks in pir_to_thread_id and bmc sensor] Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-03-07external: Add support for aarch64Eddie James2-0/+4
Update the external archictecture checker script and Makefile for aarch64. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-02-26external/ffspart: Avoid makefile race conditionReza Arbab1-1/+1
In ffspart we assign this make variable: FFSPART_VERSION ?= $(shell ./make_version.sh $(EXE)) However, ./make_version.sh is actually a make target, and whether it exists or not at the time of this assignment is by chance, depending on how the make concurrency works out. In practice, this intermittently causes CI build failure: make -j${MAKE_J} check + make -j4 check ... [ RUN-TEST ] check-ffspart ... make[1]: ./make_version.sh: No such file or directory ... make[1]: *** [Makefile:13: check] Error 1 make[1]: Entering directory '/build/external/ffspart' ... running test/tests/00-usage running test/tests/01-param-sanity Fatal error, cannot execute binary './ffspart'. Did you make? make[1]: Leaving directory '/build/external/ffspart' make: *** [/build/external/Makefile.check:21: check-ffspart] Error 2 make: *** Waiting for unfinished jobs.... The rule for make_version.sh is just a symlink: make_version.sh: $(Q_LN)ln -sf ../../make_version.sh To avoid the race, call make_version.sh from its actual location instead of relying on the link to be created. The same thing was done for gard in commit 8ab0caf26de9 ("external/gard: Fix make dist target"). Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-02-26external/opal-prd: generate path to opal-prd in its service fileDan Horák2-3/+6
Currently the path where to install the opal-prd binary is defined in the Makefile by the $sbindir variable, but its service files hard-codes the path to /usr/sbin/opal-prd. The build should generate the service file based on the actual $sbindir value. Also strip the trailing slash from the $prefix variable. Signed-off-by: Dan Horák <dan@danny.cz> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-02-26external/mambo: pmem: make persistent memory disk mapping 2MB alignedMahesh Salgaonkar1-0/+32
commit 0a6a2ff30c9e ("mambo: Add persistent memory disk support") allows user to map disk images persistent memory using PMEM_DISK ENV variable. However, If the size of the disk image file passed is not 2MB align, then the Linux kernel fails to detect pmem device with misaligned error. nd_pmem namespace0.0: [mem 0x20000000000-0x203fffe01ff flags 0x200] misaligned, unable to map nd_pmem namespace0.0: probe with driver nd_pmem failed with error -95 And then linux kernel fails to mount root fs from /dev/pmem0 md: ... autorun DONE. /dev/root: Can't open blockdev VFS: Cannot open root device "/dev/pmem0" or unknown-block(0,0): error -6 [...] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) Fix this by adding remaining bytes as padding to make pmem device memory map 2MB aligned. Reported-by: Brad Thomasson <bthomas@us.ibm.com> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-02-26hdata/test: Build with -Wno-error=unterminated-string-initializationReza Arbab1-0/+2
Six bytes of the HDIF header are used as an eye catcher: struct HDIF_common_hdr { ... char id[6]; /* eye catcher string */ ... } We assign all six characters of this string without a terminating nul, so now that GCC 15 enables -Werror=unterminated-string-initialization by default, the build breaks: In file included from hdata/test/../spira.h:7, from hdata/test/../cpu-common.c:5, from hdata/test/hdata_to_dt.c:148: hdata/test/../spira.c:35:32: error: initializer-string for array of 'char' is too long [-Werror=unterminated-string-initialization] 35 | .hdr = HDIF_SIMPLE_HDR("PROCIN", 1, struct proc_init_data), | ^~~~~~~~ hdata/test/../hdif.h:45:68: note: in definition of macro 'HDIF_ID' 45 | #define HDIF_ID(_id) .d1f0 = CPU_TO_BE16(0xd1f0), .id = _id | ^~~ hdata/test/../spira.c:35:16: note: in expansion of macro 'HDIF_SIMPLE_HDR' 35 | .hdr = HDIF_SIMPLE_HDR("PROCIN", 1, struct proc_init_data), | ^~~~~~~~~~~~~~~ hdata/test/../spira.h:797:33: error: initializer-string for array of 'char' is too long [-Werror=unterminated-string-initialization] 797 | #define CPU_CTL_HDIF_SIG "CPUCTL" | ^~~~~~~~ hdata/test/../hdif.h:45:68: note: in definition of macro 'HDIF_ID' 45 | #define HDIF_ID(_id) .d1f0 = CPU_TO_BE16(0xd1f0), .id = _id | ^~~ hdata/test/../spira.c:73:16: note: in expansion of macro 'HDIF_SIMPLE_HDR' 73 | .hdr = HDIF_SIMPLE_HDR(CPU_CTL_HDIF_SIG, 2, struct cpu_ctl_init_data), | ^~~~~~~~~~~~~~~ hdata/test/../spira.c:73:32: note: in expansion of macro 'CPU_CTL_HDIF_SIG' 73 | .hdr = HDIF_SIMPLE_HDR(CPU_CTL_HDIF_SIG, 2, struct cpu_ctl_init_data), | ^~~~~~~~~~~~~~~~ hdata/test/../spira.h:30:33: error: initializer-string for array of 'char' is too long [-Werror=unterminated-string-initialization] 30 | #define SPIRAH_HDIF_SIG "SPIRAH" | ^~~~~~~~ hdata/test/../hdif.h:45:68: note: in definition of macro 'HDIF_ID' 45 | #define HDIF_ID(_id) .d1f0 = CPU_TO_BE16(0xd1f0), .id = _id | ^~~ hdata/test/../spira.c:126:16: note: in expansion of macro 'HDIF_SIMPLE_HDR' 126 | .hdr = HDIF_SIMPLE_HDR(SPIRAH_HDIF_SIG, SPIRAH_VERSION, struct spirah), | ^~~~~~~~~~~~~~~ hdata/test/../spira.c:126:32: note: in expansion of macro 'SPIRAH_HDIF_SIG' 126 | .hdr = HDIF_SIMPLE_HDR(SPIRAH_HDIF_SIG, SPIRAH_VERSION, struct spirah), | ^~~~~~~~~~~~~~~ To ignore the spurious error, build the single testcase that trips this with -Wno-error=unterminated-string-initialization. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Dan Horák <dan@danny.cz>
2025-01-24hw/sbe-p9: P10 additionsNicholas Piggin1-5/+43
P10 has a lower minimum timeout threshold than P9 (100usecs). Some P10 SBE timers run about 6.7% slow, which must be a hardware or firmware issue. Use the SBE timer health checking code to detect this and compensate for it. Speeding up timers as a rule is dangerous because early-expiry is a bug, howerver the core timer code checks expiry against the CPU's timebase when running timers, and with the previous changes it will schedule a new SBE timer for the remaining delay. So if this adjustment speeds things up slightly too much, it won't cause bugs. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-24hw/sbe-p9: Limit SBE timer to 10sNicholas Piggin1-0/+5
The SBE in P10 has a maximum expiry limit of just over 10s, so limit SBE timers to 10s. If the desired timeout is longer than 10s, additional SBE timers will be scheduled as the 10s timers are serviced. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-24hw/sbe-p9: Fix sbe_last_gen_stamp timing inconsistencyNicholas Piggin1-8/+7
sbe_last_gen_stamp isn't a very clear name, so rename it to sbe_current_timer_tb first of all. This is used to detect if the timer should be programmed to get an earlier timeout. One issue with it is that it is set *after* the SBE acks the timer message, at which point the SBE could already have started counting the timer. This means the SBE timer interrupt could come in before that time, which is confusing and error prone. Set the field at the point the timer is submitted to the SBE. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-24hw/sbe-p9: Rename timer limitsNicholas Piggin1-9/+13
These aren't "defaults", but really minimum advertised accurate timeouts. Rename them and make them variables to accommodate changes for P10. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-24hw/sbe-p9: Better handle SBE timer rate-limitingNicholas Piggin1-6/+6
SBE timer messages are rate-limited so as not to flood the SBE. 2 timer updates are permitted before the next timer interrupt. The problem with this is that any subsequent sooner timers will not reprogram the interrupt earlier so will be arbitrarily delayed. Change this code to allow 3 updates, and have the 3rd update program the SBE to the minimum expiry time, which gives rate-limiting without compromising timer accuracy. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-24hw/sbe-p9: Change SBE lagging detectionNicholas Piggin7-11/+31
Disabling the SBE timer entirely is counter-productive: the SBE interrupt can be delayed for a number of reasons including booting or OS bugs, and there is no other timer to replace it. If the SBE timer is detected to be lagging, increase polling rate until it fires but keep it running. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15hw/sbe-p9: Re-set the SBE timer after SBE interruptNicholas Piggin1-1/+3
When the SBE interrupt fires, clear the previous sbe_timer_target and has_new_target variables, because the timer code will send us an updated timer expiry after running check_timers(). This allows for example, a case where the SBE timer has fired too early to reschedule the SBE timer again rather than leaving it to be picked up by polling. SBE timer can fire early if the timer exceeds its maximum timeout, or of the SBE timing is a little off. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15core/timer: Always update hardware timerNicholas Piggin2-8/+38
Have the core timer code always call into the SBE timers with the soonest time, so the SBE code can be more careful with maintaining the hardware timer. This fixes a bug where the SBE timer is not being set immediately on schedule_timer. With a subsequent change to SBE code, it allows an SBE timer that fires too early to cause a re-schedule of the SBE timer. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15hw/sbe-p9: Add error message for unexpected msg list stateNicholas Piggin1-1/+4
SBE message acks should always apply to the first message in the list, if the message list is empty this would be a bug, so print an error message in that case. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15hw/sbe-p9: Check SBE health on each chipNicholas Piggin1-0/+94
Add a SBE health check when initialising the SBEs, which sends a timer message and checks for the ack and timer expiry responses. This is better than eventually finding a timer is not firing and shutting down the SBE timer, it also tests SBEs on all chips in the system, not just the primary. This bypasses the queueing code to make things simpler, which is okay because the SBEs are not up yet so no other messages are being sent to the SBE. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15hw/sbe-p9: Move seq increment from queue to submitNicholas Piggin1-6/+6
The sequence number is a low level SBE hardware detail, so it can be assigned later when the message is being sent to the SBE. This allows SBE messages to be sent without queueing in special cases. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15hw/sbe: Add SBE quirk for mambo and awanNicholas Piggin4-3/+11
There appears to be no device-tree test for the P9 SBE presence like there is for P8. The P9 device tree test looks for the "primary" property, but this doesn't really test SBE presence because all chips have an SBE. It just happens to work because mambo must not add that property. So add a platform quirk, and mark mambo and awan as not having SBE. This is needed for a later change that runs a health check on every SBE in the system. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [arbab: Add #include <chip.h>] Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15tpm_i2c_nuvoton: Add support for Nuvoton 75x TPMsEric Richter2-1/+16
This patch adds the new expected values for the 75x chip to the hdat i2c devices table, and the requisite new constants to the Nuvoton driver as according to the TCG TPM I2C Interfact Specification for TPM 2.0 Revision 1.0[1]. [1] https://trustedcomputinggroup.org/resource/tcg-tpm-i2c-interface-specification/ Signed-off-by: Eric Richter <erichte@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-15tpm_i2c_nuvoton: Use struct of constants instead of macrosEric Richter1-20/+39
This driver was originally developed with only the npct650 chip in mind, which was developed before there was a TCG standard for a TPM on the i2c bus. Therefore, many constants were hardcoded using macros for the specific expected offsets and vendor information for this particular chip. To allow support for other potential Nuvoton (or maybe other i2c) chips, this patch factors out the constants into a struct so that other chips may be added, and the correct set of constants can be selected at runtime. Signed-off-by: Eric Richter <erichte@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10platforms/qemu: QEMU now has support for direct controls on Power10Nicholas Piggin3-7/+10
The QUIRK_NO_DIRECT_CTL quirk is no longer required for Power10 on QEMU. Older QEMU versions won't work, but skiboot and Linux should just time out the NMI IPIs and fall back. Add QUIRK_NO_DIRECT_CTL to mambo rather than check mambo explicitly. There are some hacks around the fast reboot code for mambo still, but they have never worked too well. Now that QEMU supports it, the mambo stuff there could be removed eventually. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/occ: Endian fixesNicholas Piggin1-26/+34
Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/occ: Tidy code and add error messageNicholas Piggin1-50/+1
The POWER10 init case is just a duplicate of POWER9 for now, so consolidate it. Add an error message for unknown response type. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/occ: Fix OCC structure layoutNicholas Piggin1-6/+8
POWER10 addition accidentally changed a structure size by one byte. Fixes: c8c36ada1d9a ("occ: Add POWER10 support") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/occ: Fix version checkNicholas Piggin1-1/+1
This test is always false due to a typo, which disables OCC sensor and command functions. Not sure why compiler doesn't warn about always true condition. Fixes: c8c36ada1d9a ("occ: Add POWER10 support") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/psi: Add LPC client names to PSI SIRQ interruptsNicholas Piggin7-41/+79
Add a name string to LPC client irq sources. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10hw/bt: Work around QEMU lost interrupt bugNicholas Piggin1-0/+10
QEMU has a bug where it loses the BT interrupt somewhere between BT and XIVE when the OS boots. For now, add a workaround QEMU quirk in the poller to try to kick things along again. SBE suffers the same problem but it has a poller that kicks the SBE and gets it going again. Suspect the PSI interrupts may not be re-presented after the OS re-initialises XIVE. This issue does not seem to appear on real hardware. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-10platforms/astbmc: Fix IPMI set BMC global enables commandNicholas Piggin1-31/+16
The bitfields were in the wrong order. Use bit operations instead. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08core/cpu: Fix invalid SMT indexesNicholas Piggin1-26/+34
Code using cpu_thread_count is dangerous because that is the maximum number of threads that a CPU type supports, not the actual number of threads. For real hardware that hardly matters, but QEMU can run a single thread Power10, for example. This causes some code (e.g., xive_init_cpu_properties) to access beyond the end of allocated arrays. Fix this by making cpu_thread_count the actual number of threads discovered via dt. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08hw/phb4: Avoid wait for PERST when running on QEMUNicholas Piggin1-0/+4
Waiting for PCI reset is the most costly component of a QEMU boot, mostly due to 1s delay between PERST deassert and device config space access. These PCI hardware delays are not required with QEMU, so skip them on that platform. On a single-CPU QEMU powernv10 machine where PCI probing is not well parallelised, this reduces skiboot boot time from 6.3s to 0.4s. This is important for testing and CI. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08libstb: endian annotationsNicholas Piggin4-9/+9
Add endian annotations to silence sparse endian warnings in libstb. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08npu/pau: endian fixesNicholas Piggin5-14/+15
Add endian annotations to NPU OPAL APIs, and fix warnings and bugs reported by sparse. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08core/hmi: fix endian conversion bugNicholas Piggin1-1/+1
Fix an endian conversion bug in HMI checkstop reporting. Noticed by sparse. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2025-01-08opal-ci: Drop fedora39, add fedora41Reza Arbab4-3/+3
Fedora 39 has reached end-of-life. Remove it and add Fedora 41. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Dan Horák <dan@danny.cz>
2024-09-10opal-ci: Remove centos7Reza Arbab3-46/+1
CentOS 7 end of life was June 30, 2024. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Dan Horák <dan@danny.cz>
2024-09-10Makefile: Use '--ignore-errors unused' with lcovReza Arbab1-1/+1
We are a bit overzealous in specifying arguments to 'lcov -r', listing files (via wildcard) that are not actually in the tracefile. This is harmless, but will cause newer lcov to generate an error message of type 'unused'. Reduce this error to a warning. Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-09-10ci: Update github actions to run on Node 20Reza Arbab2-2/+2
Github is deprecating Node 16 for actions[1]. Update our workflow from using actions/checkout@v3 to v4, which runs on Node 20. [1] https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/ Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-08-02core/pldm: Fix Use of uninitialised valueAbhishek Singh Tomar1-1/+1
In decode_platform_event_message_resp() when response.completion_code is not PLDM_SUCCESS then response.platform_event_status remain uninitialized this end up triggering following warning ==48024== Use of uninitialised value of size 8 ==48024== at 0x48D12CB: _itoa_word (_itoa.c:183) ==48024== by 0x48DBFA1: __printf_buffer (vfprintf-process-arg.c:155) ==48024== by 0x48DE072: __vfprintf_internal (vfprintf-internal.c:1559) ==48024== by 0x42DD97: vprintf (stdio.h:41) ==48024== by 0x42DD97: _prlog (stubs.c:27) ==48024== by 0x426C92: send_repository_changed_event (pldm-platform-requests.c:929) ==48024== by 0x426E7D: add_hosted_pdrs (pldm-platform-requests.c:973) ==48024== by 0x427752: pldm_platform_init (pldm-platform-requests.c:1226) Fix issue by intializing struct response with 0. Signed-off-by: Abhishek Singh Tomar <abhishek@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-08-02core/pldm: Fix dangling point issueAbhishek Singh Tomar1-1/+3
When calling pldm_platform_init() and the GET_PDR PLDM request fails, the 'pdrs_repo' global variable is freed but becomes a dangling pointer. Subsequent calls to pldm_platform_init will lead to an invalid read. ==28652== Invalid read of size 8 ==28652== at 0x40A4C8: pldm_pdr_destroy (pdr.c:130) ==28652== by 0x424BA3: pdr_init_complete (pldm-platform-requests.c:42) ==28652== by 0x4274DA: pldm_platform_load_pdrs (pldm-platform-requests.c:1170) ==28652== by 0x42759C: pdrs_init (pldm-platform-requests.c:1190) ==28652== by 0x427703: pldm_platform_init (pldm-platform-requests.c:1221) Signed-off-by: Abhishek Singh Tomar <abhishek@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-08-02core/pldm: Fix pdr handle to add first pdr requestAbhishek Singh Tomar1-0/+3
As per the specification: To retrieve the first PDR record, use the get_pdr_req function with handle 0. On the BMC side, the first PDR is sent in response, along with the next_record_hndl which can be used to access consecutive PDR records. However, it's important to note that the first PDR may not necessarily have a handle of 1. In the current scenario, providing a record_hndl value of 0 to pldm_pdr_add() will always result in the addition of a record to the repository with a PDR handle of 1. In current fix record handle is extracted from pdr record data. Signed-off-by: Abhishek Singh Tomar <abhishek@linux.ibm.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-08-02opal-ci: Drop fedora38, add fedora40Reza Arbab4-3/+3
Fedora 38 has reached end-of-life. Remove it and add Fedora 40. Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2024-01-02opal-ci: Drop fedora37, add fedora39Reza Arbab4-3/+3
Fedora 37 has reached end-of-life. Remove it and add Fedora 39. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Dan Horák <dan@danny.cz>
2023-11-27hw/imc: Detect BML and fix core countersRyan Grimm3-5/+10
On systems running BML we started noticing this in the skiboot log: [ 409.088819302,3] XSCOM: write error gcid=0x0 pcb_addr=0x20000060 stat=0x4 [ 409.088823446,3] ELOG: Error getting buffer to log error [ 409.088824806,3] XSCOM: Write failed, ret = -26 [ 409.088825797,3] IMC: error in xscom_write for pdbar [ 0.468976][ T19] core_imc memory allocation for cpu 0 failed [ 0.468993][ T1] IMC PMU core_imc Register failed I tracked down that bad pcb_addr to this line in the code: pdbar_addr = get_imc_scom_addr_for_quad(phys_core_id, pdbar_scom_index[port_id]); I found that pdbar_scom_index was not initialized because, like mambo, we don't have the IMC catalog in memory. So, in imc_init we error out and never initialize it in setup_imc_scoms. This patch adds a chip quirk QUIRK_BML because it seems like a reasonable thing to do and it's easy to put a BML {}; in the device tree like Mambo, Awan, etc. It is tested on a Rainier and errors are gone and /sys/devices/core_imc shows up as expected. Signed-off-by: Ryan Grimm <grimm@linux.ibm.com> Reviewed-By: Madhavan Srinivasan <maddy@linux.ibm.com>
2023-10-11hdata: Use existing define for PCIA signature checkNicholas Piggin1-1/+1
Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
2023-10-11hdata: make for_each_pcia take spiras as an argumentNicholas Piggin4-4/+4
Have for_each_pcia take spiras as an argument rather than use the global variable. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
generated by cgit v1.1 at 2025-03-29 19:25:44 +0000