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| author | Kevin O'Connor <kevin@koconnor.net> | 2016-02-02 22:33:17 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2016-02-02 23:16:41 -0500 |
| commit | c53953ac568fa4501f1a619240eecd4bd38cbb21 (patch) | |
| tree | 68b7ad4e06734935e49789573ec6589797278f63 | |
| parent | a46fdbfc68520a7da23bc6e87310c4f372f00fd7 (diff) | |
| download | seabios-hppa-c53953ac568fa4501f1a619240eecd4bd38cbb21.zip seabios-hppa-c53953ac568fa4501f1a619240eecd4bd38cbb21.tar.gz seabios-hppa-c53953ac568fa4501f1a619240eecd4bd38cbb21.tar.bz2 | |
xhci: Convert to new PCI BAR helper functions
Use the pci_enable_x() functions.
The xhci controller code will now explicitly set PCI_COMMAND_MEMORY
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/hw/usb-xhci.c | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/src/hw/usb-xhci.c b/src/hw/usb-xhci.c index ad541ab..af09592 100644 --- a/src/hw/usb-xhci.c +++ b/src/hw/usb-xhci.c @@ -230,7 +230,6 @@ struct usb_xhci_s { struct usb_s usb; /* devinfo */ - u32 baseaddr; u32 xcap; u32 ports; u32 slots; @@ -527,20 +526,21 @@ fail: static void xhci_controller_setup(struct pci_device *pci) { + void *baseaddr = pci_enable_membar(pci, PCI_BASE_ADDRESS_0); + if (!baseaddr) + return; + struct usb_xhci_s *xhci = malloc_high(sizeof(*xhci)); if (!xhci) { warn_noalloc(); return; } memset(xhci, 0, sizeof(*xhci)); - - xhci->baseaddr = pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0) - & PCI_BASE_ADDRESS_MEM_MASK; - xhci->caps = (void*)(xhci->baseaddr); - xhci->op = (void*)(xhci->baseaddr + readb(&xhci->caps->caplength)); - xhci->pr = (void*)(xhci->baseaddr + readb(&xhci->caps->caplength) + 0x400); - xhci->db = (void*)(xhci->baseaddr + readl(&xhci->caps->dboff)); - xhci->ir = (void*)(xhci->baseaddr + readl(&xhci->caps->rtsoff) + 0x20); + xhci->caps = baseaddr; + xhci->op = baseaddr + readb(&xhci->caps->caplength); + xhci->pr = baseaddr + readb(&xhci->caps->caplength) + 0x400; + xhci->db = baseaddr + readl(&xhci->caps->dboff); + xhci->ir = baseaddr + readl(&xhci->caps->rtsoff) + 0x20; u32 hcs1 = readl(&xhci->caps->hcsparams1); u32 hcc = readl(&xhci->caps->hccparams); @@ -559,9 +559,10 @@ xhci_controller_setup(struct pci_device *pci) , xhci->ports, xhci->slots, xhci->context64 ? 64 : 32); if (xhci->xcap) { - u32 off, addr = xhci->baseaddr + xhci->xcap; + u32 off; + void *addr = baseaddr + xhci->xcap; do { - struct xhci_xcap *xcap = (void*)addr; + struct xhci_xcap *xcap = addr; u32 ports, name, cap = readl(&xcap->cap); switch (cap & 0xff) { case 0x02: @@ -580,7 +581,7 @@ xhci_controller_setup(struct pci_device *pci) , ports >> 16); break; default: - dprintf(1, "XHCI extcap 0x%x @ %x\n", cap & 0xff, addr); + dprintf(1, "XHCI extcap 0x%x @ %p\n", cap & 0xff, addr); break; } off = (cap >> 8) & 0xff; @@ -596,7 +597,7 @@ xhci_controller_setup(struct pci_device *pci) return; } - pci_config_maskw(pci->bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER); + pci_enable_busmaster(pci); run_thread(configure_xhci, xhci); } |