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| author | Richard Henderson <rth@twiddle.net> | 2011-04-13 16:57:22 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2011-04-13 16:57:22 -0700 |
| commit | 2f26e86da27f7fe59e16abb5535f64bdad29e688 (patch) | |
| tree | 1658055e9a665c7075883b435af356e1eef70fd2 /pal.S | |
| parent | 2f022b055a875fe2099737a7435e9df458038e5e (diff) | |
| download | qemu-palcode-2f26e86da27f7fe59e16abb5535f64bdad29e688.zip qemu-palcode-2f26e86da27f7fe59e16abb5535f64bdad29e688.tar.gz qemu-palcode-2f26e86da27f7fe59e16abb5535f64bdad29e688.tar.bz2 | |
PCBB.PTBR contains a page frame number, not a physical address.
Diffstat (limited to 'pal.S')
| -rw-r--r-- | pal.S | 6 |
1 files changed, 5 insertions, 1 deletions
@@ -565,12 +565,15 @@ CallPal_SwpPal_Cont: ldq_p t4, PCB_Q_FEN(a2) mtpr t0, ptUsp + + sll t1, VA_S_OFF, t1 mtpr t1, qemu_ptbr - mtpr t3, qemu_unique subl t2, p0, t2 mtpr t2, qemu_pcc_ofs + mtpr t3, qemu_unique + and t4, 1, t4 mtpr t4, qemu_fen @@ -908,6 +911,7 @@ CallPal_SwpCtx_Cont: // QEMU does not implement an ASN; skip that. ldq_p t10, PCB_Q_PTBR(a0) // Install new page tables + sll t10, VA_S_OFF, t10 mtpr t10, qemu_ptbr mtpr $31, qemu_tbia // Flush TLB, since we don't do ASNs |