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author | Inochi Amaoto <inochiama@outlook.com> | 2023-08-11 08:13:01 +0800 |
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committer | Anup Patel <anup@brainfault.org> | 2023-08-22 13:26:05 +0530 |
commit | e7e73aa532fa5813f457b9b09899413f41885d37 (patch) | |
tree | df9e4163d0c38106b8302b33654681e1a12ce2f5 /platform | |
parent | 7aabeee93edb2e7ab03954e235683bfd9d8f29eb (diff) | |
download | opensbi-e7e73aa532fa5813f457b9b09899413f41885d37.zip opensbi-e7e73aa532fa5813f457b9b09899413f41885d37.tar.gz opensbi-e7e73aa532fa5813f457b9b09899413f41885d37.tar.bz2 |
platform: generic: allwinner: correct mhpmevent count
Only the CSR mhpmevent 3-9,13-17 of D1 have valid function, so change
the mhpm_mask to a valid value to avoid invalid usage.
Due to the openc906 pmu code
https://github.com/T-head-Semi/openc906/blob/main/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'platform')
-rw-r--r-- | platform/generic/allwinner/sun20i-d1.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c index 0f0a9f3..03cb92c 100644 --- a/platform/generic/allwinner/sun20i-d1.c +++ b/platform/generic/allwinner/sun20i-d1.c @@ -272,7 +272,8 @@ static int sun20i_d1_extensions_init(const struct fdt_match *match, sbi_pmu_set_device(&thead_c9xx_pmu_device); /* auto-detection doesn't work on t-head c9xx cores */ - hfeatures->mhpm_count = 29; + /* D1 has 29 mhpmevent csrs, but only 3-9,13-17 have valid value */ + hfeatures->mhpm_mask = 0x0003e3f8; hfeatures->mhpm_bits = 64; return 0; |