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| author | Anup Patel <anup.patel@wdc.com> | 2021-04-22 11:53:32 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2021-04-28 17:25:00 +0530 |
| commit | 043d088e3964ec64b091f739e2282f53f7d264fb (patch) | |
| tree | e5ec82451c097df3f3416ec077752527d81107a7 /platform/nuclei | |
| parent | dc39c7b630a607b96c25f8ea50f0bb1af619928a (diff) | |
| download | opensbi-043d088e3964ec64b091f739e2282f53f7d264fb.zip opensbi-043d088e3964ec64b091f739e2282f53f7d264fb.tar.gz opensbi-043d088e3964ec64b091f739e2282f53f7d264fb.tar.bz2 | |
lib: sbi: Simplify system reset platform operations
Instead of having system_reset_check() and system_reset() callbacks
in platform operations, it will be much simpler for reset driver to
directly register these operations as a device to the sbi_system
implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'platform/nuclei')
| -rw-r--r-- | platform/nuclei/ux600/platform.c | 38 |
1 files changed, 23 insertions, 15 deletions
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c index ac81d03..5414316 100644 --- a/platform/nuclei/ux600/platform.c +++ b/platform/nuclei/ux600/platform.c @@ -15,6 +15,7 @@ #include <sbi/sbi_console.h> #include <sbi/sbi_const.h> #include <sbi/sbi_platform.h> +#include <sbi/sbi_system.h> #include <sbi_utils/fdt/fdt_fixup.h> #include <sbi_utils/irqchip/plic.h> #include <sbi_utils/serial/sifive-uart.h> @@ -104,10 +105,32 @@ static u32 ux600_get_clk_freq(void) return cpu_freq; } +static int ux600_system_reset_check(u32 type, u32 reason) +{ + return 1; +} + +static void ux600_system_reset(u32 type, u32 reason) +{ + /* Reset system using MSFTRST register in Nuclei Timer. */ + writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR + + UX600_NUCLEI_TIMER_MSFTRST_OFS)); + while(1); +} + +static struct sbi_system_reset_device ux600_reset = { + .name = "nuclei_ux600_reset", + .system_reset_check = ux600_system_reset_check, + .system_reset = ux600_system_reset +}; + static int ux600_early_init(bool cold_boot) { u32 regval; + if (cold_boot) + sbi_system_reset_set_device(&ux600_reset); + /* Measure CPU Frequency using Timer */ ux600_clk_freq = ux600_get_clk_freq(); @@ -186,19 +209,6 @@ static int ux600_timer_init(bool cold_boot) return clint_warm_timer_init(); } -static int ux600_system_reset_check(u32 type, u32 reason) -{ - return 1; -} - -static void ux600_system_reset(u32 type, u32 reason) -{ - /* Reset system using MSFTRST register in Nuclei Timer. */ - writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR - + UX600_NUCLEI_TIMER_MSFTRST_OFS)); - while(1); -} - const struct sbi_platform_operations platform_ops = { .early_init = ux600_early_init, .final_init = ux600_final_init, @@ -206,8 +216,6 @@ const struct sbi_platform_operations platform_ops = { .irqchip_init = ux600_irqchip_init, .ipi_init = ux600_ipi_init, .timer_init = ux600_timer_init, - .system_reset_check = ux600_system_reset_check, - .system_reset = ux600_system_reset }; const struct sbi_platform platform = { |