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| author | Cheng Yang <yangcheng.work@foxmail.com> | 2024-05-15 14:15:14 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-05-16 10:21:16 +0530 |
| commit | e3a30a2c918aae79d4cc403d474c3d2872a9063c (patch) | |
| tree | 172a226587819b5285eb8163bd159327de038d5a | |
| parent | 2bed4c1c57a7775bcef534934cab5c83b45b954f (diff) | |
| download | opensbi-e3a30a2c918aae79d4cc403d474c3d2872a9063c.zip opensbi-e3a30a2c918aae79d4cc403d474c3d2872a9063c.tar.gz opensbi-e3a30a2c918aae79d4cc403d474c3d2872a9063c.tar.bz2 | |
lib: utils/irqchip: Check before initializing imsic
The current mlevel imsic check is only for the platform, which
may cause hart without imsic in the platform to trigger an
illegal instruction exception when initializing imsic. For
example, the platform contains a management hart that only
supports wired interrupts.
This patch will check if each hart supports Smaia extension
before doing imsic initialization to avoid triggering illegal
instruction exceptions.
Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/utils/irqchip/imsic.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c index f2a35c6..02e3a33 100644 --- a/lib/utils/irqchip/imsic.c +++ b/lib/utils/irqchip/imsic.c @@ -12,6 +12,7 @@ #include <sbi/riscv_io.h> #include <sbi/riscv_encoding.h> #include <sbi/sbi_console.h> +#include <sbi/sbi_csr_detect.h> #include <sbi/sbi_domain.h> #include <sbi/sbi_ipi.h> #include <sbi/sbi_irqchip.h> @@ -222,6 +223,8 @@ static void imsic_local_eix_update(unsigned long base_id, void imsic_local_irqchip_init(void) { + struct sbi_trap_info trap = { 0 }; + /* * This function is expected to be called from: * 1) nascent_init() platform callback which is called @@ -231,6 +234,11 @@ void imsic_local_irqchip_init(void) * in boot-up path. */ + /* If Smaia not available then do nothing */ + csr_read_allowed(CSR_MTOPI, (ulong)&trap); + if (trap.cause) + return; + /* Setup threshold to allow all enabled interrupts */ imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD); |