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| author | Pope B.Lei <popeblei@gmail.com> | 2024-04-10 10:05:20 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-05-07 18:12:24 +0530 |
| commit | 1d89a9da64e4b4f51c59c44eba2f65b037bc4d95 (patch) | |
| tree | cb52d46b2ef9d34fa0172e6adf51feb36c7aafc4 | |
| parent | 033104da08baf52c8b65b56a03363ea238c9ca31 (diff) | |
| download | opensbi-1d89a9da64e4b4f51c59c44eba2f65b037bc4d95.zip opensbi-1d89a9da64e4b4f51c59c44eba2f65b037bc4d95.tar.gz opensbi-1d89a9da64e4b4f51c59c44eba2f65b037bc4d95.tar.bz2 | |
lib: sbi: Refine the settings for switching to Virtual Supervisor Mode.
Although Mstatus.MPV is set, before executing mret, access to VS mode
registers should use the actual register addresses, not the pseudonyms
of S registers.
Signed-off-by: Pope B.Lei <popeblei@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/sbi/sbi_hart.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 0e7b5d1..cd974cc 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -1046,10 +1046,17 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1, csr_write(CSR_MEPC, next_addr); if (next_mode == PRV_S) { - csr_write(CSR_STVEC, next_addr); - csr_write(CSR_SSCRATCH, 0); - csr_write(CSR_SIE, 0); - csr_write(CSR_SATP, 0); + if (next_virt) { + csr_write(CSR_VSTVEC, next_addr); + csr_write(CSR_VSSCRATCH, 0); + csr_write(CSR_VSIE, 0); + csr_write(CSR_VSATP, 0); + } else { + csr_write(CSR_STVEC, next_addr); + csr_write(CSR_SSCRATCH, 0); + csr_write(CSR_SIE, 0); + csr_write(CSR_SATP, 0); + } } else if (next_mode == PRV_U) { if (misa_extension('N')) { csr_write(CSR_UTVEC, next_addr); |