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Diffstat (limited to 'target/s390x/cpu.c')
-rw-r--r--target/s390x/cpu.c19
1 files changed, 13 insertions, 6 deletions
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 1f75629..41cccc1 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -126,11 +126,6 @@ static vaddr s390_cpu_get_pc(CPUState *cs)
return cpu->env.psw.addr;
}
-static int s390x_cpu_mmu_index(CPUState *cs, bool ifetch)
-{
- return s390x_env_mmu_index(cpu_env(cs), ifetch);
-}
-
static void s390_query_cpu_fast(CPUState *cpu, CpuInfoFast *value)
{
S390CPU *s390_cpu = S390_CPU(cpu);
@@ -308,6 +303,11 @@ static const Property s390x_cpu_properties[] = {
#ifdef CONFIG_TCG
#include "accel/tcg/cpu-ops.h"
+static int s390x_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+ return s390x_env_mmu_index(cpu_env(cs), ifetch);
+}
+
void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *pflags)
{
@@ -345,9 +345,17 @@ void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc,
}
static const TCGCPUOps s390_tcg_ops = {
+ .mttcg_supported = true,
+ /*
+ * The z/Architecture has a strong memory model with some
+ * store-after-load re-ordering.
+ */
+ .guest_default_memory_order = TCG_MO_ALL & ~TCG_MO_ST_LD,
+
.initialize = s390x_translate_init,
.translate_code = s390x_translate_code,
.restore_state_to_opc = s390x_restore_state_to_opc,
+ .mmu_index = s390x_cpu_mmu_index,
#ifdef CONFIG_USER_ONLY
.record_sigsegv = s390_cpu_record_sigsegv,
@@ -378,7 +386,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
&scc->parent_phases);
cc->class_by_name = s390_cpu_class_by_name;
- cc->mmu_index = s390x_cpu_mmu_index;
cc->dump_state = s390_cpu_dump_state;
cc->query_cpu_fast = s390_query_cpu_fast;
cc->set_pc = s390_cpu_set_pc;