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-rw-r--r--target/hexagon/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 766b678..3c51912 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -313,6 +313,11 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
mcc->parent_realize(dev, errp);
}
+static int hexagon_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+ return MMU_USER_IDX;
+}
+
static void hexagon_cpu_init(Object *obj)
{
}
@@ -320,10 +325,14 @@ static void hexagon_cpu_init(Object *obj)
#include "accel/tcg/cpu-ops.h"
static const TCGCPUOps hexagon_tcg_ops = {
+ /* MTTCG not yet supported: require strict ordering */
+ .guest_default_memory_order = TCG_MO_ALL,
+ .mttcg_supported = false,
.initialize = hexagon_translate_init,
.translate_code = hexagon_translate_code,
.synchronize_from_tb = hexagon_cpu_synchronize_from_tb,
.restore_state_to_opc = hexagon_restore_state_to_opc,
+ .mmu_index = hexagon_cpu_mmu_index,
};
static void hexagon_cpu_class_init(ObjectClass *c, void *data)