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-rw-r--r--MAINTAINERS2
-rw-r--r--VERSION2
-rw-r--r--configs/devices/aarch64-softmmu/default.mak1
-rw-r--r--docs/about/deprecated.rst13
-rw-r--r--hw/arm/armv7m.c14
-rw-r--r--hw/arm/fsl-imx8mp.c2
-rw-r--r--hw/arm/imx8mp-evk.c2
-rw-r--r--hw/block/m25p80.c2
-rw-r--r--hw/char/bcm2835_aux.c2
-rw-r--r--hw/display/dm163.c2
-rw-r--r--hw/dma/i82374.c2
-rw-r--r--hw/i386/amd_iommu.c1
-rw-r--r--hw/mips/fuloong2e.c1
-rw-r--r--hw/mips/loongson3_virt.c1
-rw-r--r--hw/misc/aspeed_scu.c16
-rw-r--r--hw/misc/bcm2835_cprman.c8
-rw-r--r--hw/misc/npcm_clk.c6
-rw-r--r--hw/misc/stm32l4x5_rcc.c4
-rw-r--r--hw/net/virtio-net.c2
-rw-r--r--hw/nvram/xlnx-efuse.c2
-rw-r--r--hw/pci-host/designware.c2
-rw-r--r--hw/rtc/goldfish_rtc.c13
-rw-r--r--hw/scsi/lsi53c895a.c2
-rw-r--r--hw/sd/sdhci-pci.c2
-rw-r--r--hw/ufs/ufs.c3
-rw-r--r--include/hw/arm/fsl-imx8mp.h4
-rw-r--r--include/hw/core/cpu.h2
-rw-r--r--migration/channel-block.c2
-rw-r--r--system/physmem.c20
-rw-r--r--target/avr/disas.c21
-rw-r--r--target/hppa/cpu.h2
-rw-r--r--target/loongarch/cpu.h1
-rw-r--r--target/loongarch/kvm/kvm.c7
-rw-r--r--target/mips/cpu-param.h5
-rw-r--r--target/mips/tcg/system/cp0_helper.c32
-rw-r--r--target/mips/tcg/system/tlb_helper.c4
-rw-r--r--target/mips/tcg/tcg-internal.h2
-rw-r--r--target/s390x/cpu.c2
-rw-r--r--target/sparc/cpu.h2
-rw-r--r--target/sparc/ldst_helper.c6
-rw-r--r--target/sparc/mmu_helper.c2
-rw-r--r--tcg/tcg.c3
-rw-r--r--tests/functional/meson.build2
-rw-r--r--tests/functional/qemu_test/__init__.py2
-rw-r--r--tests/functional/qemu_test/decorators.py15
-rwxr-xr-xtests/functional/test_aarch64_replay.py4
-rwxr-xr-xtests/functional/test_aarch64_rme_sbsaref.py1
-rwxr-xr-xtests/functional/test_aarch64_rme_virt.py8
-rwxr-xr-xtests/functional/test_aarch64_virt_gpu.py2
-rwxr-xr-xtests/functional/test_arm_bpim2u.py2
-rwxr-xr-xtests/functional/test_arm_cubieboard.py2
-rwxr-xr-xtests/functional/test_arm_orangepi.py4
-rwxr-xr-xtests/functional/test_ppc64_hv.py3
-rwxr-xr-xtests/functional/test_ppc64_replay.py3
-rwxr-xr-xtests/functional/test_vnc.py26
-rwxr-xr-xtests/functional/test_x86_64_kvm_xen.py1
-rwxr-xr-xtests/qemu-iotests/1621
-rw-r--r--tests/qtest/libqtest.c1
58 files changed, 209 insertions, 92 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 27f2cfd..d54b557 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1019,7 +1019,7 @@ S: Maintained
F: hw/arm/virt*
F: include/hw/arm/virt.h
F: docs/system/arm/virt.rst
-F: tests/functional/test_aarch64_virt.py
+F: tests/functional/test_aarch64_virt*.py
F: tests/functional/test_aarch64_tuxrun.py
F: tests/functional/test_arm_tuxrun.py
diff --git a/VERSION b/VERSION
index cb6a54c..ce4b6dd 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-9.2.91
+9.2.92
diff --git a/configs/devices/aarch64-softmmu/default.mak b/configs/devices/aarch64-softmmu/default.mak
index 93f4022..ad8028c 100644
--- a/configs/devices/aarch64-softmmu/default.mak
+++ b/configs/devices/aarch64-softmmu/default.mak
@@ -9,3 +9,4 @@ include ../arm-softmmu/default.mak
# CONFIG_XLNX_VERSAL=n
# CONFIG_SBSA_REF=n
# CONFIG_NPCM8XX=n
+CONFIG_VMAPPLE=n
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index e2b4f07..76291fd 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -292,6 +292,19 @@ Big-Endian variants of MicroBlaze ``petalogix-ml605`` and ``xlnx-zynqmp-pmu`` ma
Both ``petalogix-ml605`` and ``xlnx-zynqmp-pmu`` were added for little endian
CPUs. Big endian support is not tested.
+Mips ``mipssim`` machine (since 10.0)
+'''''''''''''''''''''''''''''''''''''
+
+Linux dropped support for this virtual machine type in kernel v3.7, and
+there does not seem to be anybody around who is still using this board
+in QEMU: Most former MIPS-related people are working on other architectures
+in their everyday job nowadays, and we are also not aware of anybody still
+using old binaries with this board (i.e. there is also no binary available
+online to check that this board did not completely bitrot yet). It is
+recommended to use another MIPS machine for future MIPS code development
+instead.
+
+
Backend options
---------------
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 98a6984..6400917 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -140,7 +140,7 @@ static MemTxResult v7m_sysreg_ns_write(void *opaque, hwaddr addr,
/* S accesses to the alias act like NS accesses to the real region */
attrs.secure = 0;
return memory_region_dispatch_write(mr, addr, value,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
} else {
/* NS attrs are RAZ/WI for privileged, and BusFault for user */
if (attrs.user) {
@@ -160,7 +160,7 @@ static MemTxResult v7m_sysreg_ns_read(void *opaque, hwaddr addr,
/* S accesses to the alias act like NS accesses to the real region */
attrs.secure = 0;
return memory_region_dispatch_read(mr, addr, data,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
} else {
/* NS attrs are RAZ/WI for privileged, and BusFault for user */
if (attrs.user) {
@@ -174,7 +174,7 @@ static MemTxResult v7m_sysreg_ns_read(void *opaque, hwaddr addr,
static const MemoryRegionOps v7m_sysreg_ns_ops = {
.read_with_attrs = v7m_sysreg_ns_read,
.write_with_attrs = v7m_sysreg_ns_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static MemTxResult v7m_systick_write(void *opaque, hwaddr addr,
@@ -187,7 +187,7 @@ static MemTxResult v7m_systick_write(void *opaque, hwaddr addr,
/* Direct the access to the correct systick */
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0);
return memory_region_dispatch_write(mr, addr, value,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
}
static MemTxResult v7m_systick_read(void *opaque, hwaddr addr,
@@ -199,14 +199,14 @@ static MemTxResult v7m_systick_read(void *opaque, hwaddr addr,
/* Direct the access to the correct systick */
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0);
- return memory_region_dispatch_read(mr, addr, data, size_memop(size) | MO_TE,
- attrs);
+ return memory_region_dispatch_read(mr, addr, data,
+ size_memop(size) | MO_LE, attrs);
}
static const MemoryRegionOps v7m_systick_ops = {
.read_with_attrs = v7m_systick_read,
.write_with_attrs = v7m_systick_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
/*
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index c3f6da6..82edf61 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -702,7 +702,7 @@ static void fsl_imx8mp_class_init(ObjectClass *oc, void *data)
static const TypeInfo fsl_imx8mp_types[] = {
{
.name = TYPE_FSL_IMX8MP,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslImx8mpState),
.instance_init = fsl_imx8mp_init,
.class_init = fsl_imx8mp_class_init,
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index e1a7892..f17d5db 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -37,7 +37,7 @@ static void imx8mp_evk_init(MachineState *machine)
s = FSL_IMX8MP(object_new(TYPE_FSL_IMX8MP));
object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal);
- qdev_realize(DEVICE(s), NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
memory_region_add_subregion(get_system_memory(), FSL_IMX8MP_RAM_START,
machine->ram);
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index b84c6af..0887c10 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -1870,7 +1870,9 @@ static void m25p80_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_m25p80;
device_class_set_props(dc, m25p80_properties);
device_class_set_legacy_reset(dc, m25p80_reset);
+ set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
mc->pi = data;
+ dc->desc = "Serial Flash";
}
static const TypeInfo m25p80_info = {
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index c6e7ecc..9b073fc 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -98,7 +98,7 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
* interrupts are active, besides that this cannot occur. At
* present, we choose to prioritise the rx interrupt, since
* the tx fifo is always empty. */
- if (s->read_count != 0) {
+ if ((s->iir & RX_INT) && s->read_count != 0) {
res |= 0x4;
} else {
res |= 0x2;
diff --git a/hw/display/dm163.c b/hw/display/dm163.c
index 75a91f6..f6f0ec0 100644
--- a/hw/display/dm163.c
+++ b/hw/display/dm163.c
@@ -330,7 +330,7 @@ static void dm163_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
- dc->desc = "DM163";
+ dc->desc = "DM163 8x3-channel constant current LED driver";
dc->vmsd = &vmstate_dm163;
dc->realize = dm163_realize;
rc->phases.hold = dm163_reset_hold;
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index 9652d47..0bf69ef 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -150,6 +150,8 @@ static void i82374_class_init(ObjectClass *klass, void *data)
dc->realize = i82374_realize;
dc->vmsd = &vmstate_i82374;
device_class_set_props(dc, i82374_properties);
+ dc->desc = "Intel 82374 DMA controller";
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
static const TypeInfo i82374_info = {
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 5b21cf1..5f9b952 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1706,6 +1706,7 @@ static void amdvi_pci_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->vendor_id = PCI_VENDOR_ID_AMD;
+ k->device_id = 0x1419;
k->class_id = 0x0806;
k->realize = amdvi_pci_realize;
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 646044e..2a8507b 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -334,7 +334,6 @@ static void mips_fuloong2e_machine_init(MachineClass *mc)
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
mc->default_ram_size = 256 * MiB;
mc->default_ram_id = "fuloong2e.ram";
- mc->minimum_page_bits = 14;
machine_add_audiodev_property(mc);
}
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
index db1cc51..1da20dc 100644
--- a/hw/mips/loongson3_virt.c
+++ b/hw/mips/loongson3_virt.c
@@ -677,7 +677,6 @@ static void loongson3v_machine_class_init(ObjectClass *oc, void *data)
mc->max_cpus = LOONGSON_MAX_VCPUS;
mc->default_ram_id = "loongson3.highram";
mc->default_ram_size = 1600 * MiB;
- mc->minimum_page_bits = 14;
mc->default_nic = "virtio-net-pci";
}
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 76cfd91..1af1a35 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -427,6 +427,10 @@ static const MemoryRegionOps aspeed_ast2400_scu_ops = {
.read = aspeed_scu_read,
.write = aspeed_ast2400_scu_write,
.endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
.valid = {
.min_access_size = 1,
.max_access_size = 4,
@@ -437,7 +441,9 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = {
.read = aspeed_scu_read,
.write = aspeed_ast2500_scu_write,
.endianness = DEVICE_LITTLE_ENDIAN,
- .valid.min_access_size = 4,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 1,
.valid.max_access_size = 4,
.valid.unaligned = false,
};
@@ -779,7 +785,9 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = {
.read = aspeed_ast2600_scu_read,
.write = aspeed_ast2600_scu_write,
.endianness = DEVICE_LITTLE_ENDIAN,
- .valid.min_access_size = 4,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 1,
.valid.max_access_size = 4,
.valid.unaligned = false,
};
@@ -906,6 +914,8 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = {
.read = aspeed_ast2700_scu_read,
.write = aspeed_ast2700_scu_write,
.endianness = DEVICE_LITTLE_ENDIAN,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
.valid.min_access_size = 1,
.valid.max_access_size = 8,
.valid.unaligned = false,
@@ -1028,6 +1038,8 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = {
.read = aspeed_ast2700_scuio_read,
.write = aspeed_ast2700_scuio_write,
.endianness = DEVICE_LITTLE_ENDIAN,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
.valid.min_access_size = 1,
.valid.max_access_size = 8,
.valid.unaligned = false,
diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
index aa14cd9..0c4d4b7 100644
--- a/hw/misc/bcm2835_cprman.c
+++ b/hw/misc/bcm2835_cprman.c
@@ -137,6 +137,8 @@ static void pll_class_init(ObjectClass *klass, void *data)
device_class_set_legacy_reset(dc, pll_reset);
dc->vmsd = &pll_vmstate;
+ /* Reason: Part of BCM2835CprmanState component */
+ dc->user_creatable = false;
}
static const TypeInfo cprman_pll_info = {
@@ -241,6 +243,8 @@ static void pll_channel_class_init(ObjectClass *klass, void *data)
device_class_set_legacy_reset(dc, pll_channel_reset);
dc->vmsd = &pll_channel_vmstate;
+ /* Reason: Part of BCM2835CprmanState component */
+ dc->user_creatable = false;
}
static const TypeInfo cprman_pll_channel_info = {
@@ -362,6 +366,8 @@ static void clock_mux_class_init(ObjectClass *klass, void *data)
device_class_set_legacy_reset(dc, clock_mux_reset);
dc->vmsd = &clock_mux_vmstate;
+ /* Reason: Part of BCM2835CprmanState component */
+ dc->user_creatable = false;
}
static const TypeInfo cprman_clock_mux_info = {
@@ -416,6 +422,8 @@ static void dsi0hsck_mux_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &dsi0hsck_mux_vmstate;
+ /* Reason: Part of BCM2835CprmanState component */
+ dc->user_creatable = false;
}
static const TypeInfo cprman_dsi0hsck_mux_info = {
diff --git a/hw/misc/npcm_clk.c b/hw/misc/npcm_clk.c
index 0e85974..b6a893f 100644
--- a/hw/misc/npcm_clk.c
+++ b/hw/misc/npcm_clk.c
@@ -1108,6 +1108,8 @@ static void npcm7xx_clk_pll_class_init(ObjectClass *klass, void *data)
dc->desc = "NPCM7xx Clock PLL Module";
dc->vmsd = &vmstate_npcm7xx_clk_pll;
+ /* Reason: Part of NPCMCLKState component */
+ dc->user_creatable = false;
}
static void npcm7xx_clk_sel_class_init(ObjectClass *klass, void *data)
@@ -1116,6 +1118,8 @@ static void npcm7xx_clk_sel_class_init(ObjectClass *klass, void *data)
dc->desc = "NPCM7xx Clock SEL Module";
dc->vmsd = &vmstate_npcm7xx_clk_sel;
+ /* Reason: Part of NPCMCLKState component */
+ dc->user_creatable = false;
}
static void npcm7xx_clk_divider_class_init(ObjectClass *klass, void *data)
@@ -1124,6 +1128,8 @@ static void npcm7xx_clk_divider_class_init(ObjectClass *klass, void *data)
dc->desc = "NPCM7xx Clock Divider Module";
dc->vmsd = &vmstate_npcm7xx_clk_divider;
+ /* Reason: Part of NPCMCLKState component */
+ dc->user_creatable = false;
}
static void npcm_clk_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c
index fd8466d..158b743 100644
--- a/hw/misc/stm32l4x5_rcc.c
+++ b/hw/misc/stm32l4x5_rcc.c
@@ -150,6 +150,8 @@ static void clock_mux_class_init(ObjectClass *klass, void *data)
rc->phases.hold = clock_mux_reset_hold;
rc->phases.exit = clock_mux_reset_exit;
dc->vmsd = &clock_mux_vmstate;
+ /* Reason: Part of Stm32l4x5RccState component */
+ dc->user_creatable = false;
}
static void clock_mux_set_enable(RccClockMuxState *mux, bool enabled)
@@ -302,6 +304,8 @@ static void pll_class_init(ObjectClass *klass, void *data)
rc->phases.hold = pll_reset_hold;
rc->phases.exit = pll_reset_exit;
dc->vmsd = &pll_vmstate;
+ /* Reason: Part of Stm32l4x5RccState component */
+ dc->user_creatable = false;
}
static void pll_set_vco_multiplier(RccPllState *pll, uint32_t vco_multiplier)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index de87cfa..340c6b6 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -1999,6 +1999,8 @@ static ssize_t virtio_net_receive_rcu(NetClientState *nc, const uint8_t *buf,
offsetof(typeof(hdr),
virtio_net.hdr.num_buffers),
sizeof(hdr.virtio_net.hdr.num_buffers));
+ } else {
+ hdr.virtio_net.hdr.num_buffers = cpu_to_le16(1);
}
guest_offset = n->has_vnet_hdr ?
diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
index 29e7dd5..176e88f 100644
--- a/hw/nvram/xlnx-efuse.c
+++ b/hw/nvram/xlnx-efuse.c
@@ -280,6 +280,8 @@ static void efuse_class_init(ObjectClass *klass, void *data)
dc->realize = efuse_realize;
device_class_set_props(dc, efuse_properties);
+ /* Reason: Part of Xilinx SoC */
+ dc->user_creatable = false;
}
static const TypeInfo efuse_info = {
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index c07740b..5598d18 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -371,7 +371,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address,
case DESIGNWARE_PCIE_ATU_UPPER_TARGET:
viewport->target &= 0x00000000FFFFFFFFULL;
- viewport->target |= val;
+ viewport->target |= (uint64_t)val << 32;
break;
case DESIGNWARE_PCIE_ATU_LIMIT:
diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
index 0f1b53e..d83cc26 100644
--- a/hw/rtc/goldfish_rtc.c
+++ b/hw/rtc/goldfish_rtc.c
@@ -239,15 +239,8 @@ static const VMStateDescription goldfish_rtc_vmstate = {
static void goldfish_rtc_reset(DeviceState *dev)
{
GoldfishRTCState *s = GOLDFISH_RTC(dev);
- struct tm tm;
timer_del(s->timer);
-
- qemu_get_timedate(&tm, 0);
- s->tick_offset = mktimegm(&tm);
- s->tick_offset *= NANOSECONDS_PER_SECOND;
- s->tick_offset -= qemu_clock_get_ns(rtc_clock);
- s->tick_offset_vmstate = 0;
s->alarm_next = 0;
s->alarm_running = 0;
s->irq_pending = 0;
@@ -258,6 +251,7 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp)
{
SysBusDevice *dev = SYS_BUS_DEVICE(d);
GoldfishRTCState *s = GOLDFISH_RTC(d);
+ struct tm tm;
memory_region_init_io(&s->iomem, OBJECT(s),
&goldfish_rtc_ops[s->big_endian], s,
@@ -267,6 +261,11 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp)
sysbus_init_irq(dev, &s->irq);
s->timer = timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s);
+
+ qemu_get_timedate(&tm, 0);
+ s->tick_offset = mktimegm(&tm);
+ s->tick_offset *= NANOSECONDS_PER_SECOND;
+ s->tick_offset -= qemu_clock_get_ns(rtc_clock);
}
static const Property goldfish_rtc_properties[] = {
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index d85e384..6689ebb 100644
--- a/hw/scsi/lsi53c895a.c
+++ b/hw/scsi/lsi53c895a.c
@@ -2372,7 +2372,7 @@ static void lsi_scsi_exit(PCIDevice *dev)
LSIState *s = LSI53C895A(dev);
address_space_destroy(&s->pci_io_as);
- timer_del(s->scripts_timer);
+ timer_free(s->scripts_timer);
}
static void lsi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c
index 5268c0d..bca149e 100644
--- a/hw/sd/sdhci-pci.c
+++ b/hw/sd/sdhci-pci.c
@@ -18,6 +18,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
+#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/sd/sdhci.h"
#include "sdhci-internal.h"
@@ -48,6 +49,7 @@ static void sdhci_pci_exit(PCIDevice *dev)
{
SDHCIState *s = PCI_SDHCI(dev);
+ qemu_free_irq(s->irq);
sdhci_common_unrealize(s);
sdhci_uninitfn(s);
}
diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c
index 857de6e..ee13eda 100644
--- a/hw/ufs/ufs.c
+++ b/hw/ufs/ufs.c
@@ -25,6 +25,7 @@
#include "qapi/error.h"
#include "migration/vmstate.h"
#include "scsi/constants.h"
+#include "hw/irq.h"
#include "trace.h"
#include "ufs.h"
@@ -1808,6 +1809,8 @@ static void ufs_exit(PCIDevice *pci_dev)
{
UfsHc *u = UFS(pci_dev);
+ qemu_free_irq(u->irq);
+
qemu_bh_delete(u->doorbell_bh);
qemu_bh_delete(u->complete_bh);
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index bc97fc4..d016f7d 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -26,6 +26,7 @@
#include "hw/timer/imx_gpt.h"
#include "hw/usb/hcd-dwc3.h"
#include "hw/watchdog/wdt_imx2.h"
+#include "hw/sysbus.h"
#include "qom/object.h"
#include "qemu/units.h"
@@ -49,7 +50,7 @@ enum FslImx8mpConfiguration {
};
struct FslImx8mpState {
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
ARMCPU cpu[FSL_IMX8MP_NUM_CPUS];
GICv3State gic;
@@ -237,7 +238,6 @@ enum FslImx8mpIrqs {
FSL_IMX8MP_ECSPI1_IRQ = 31,
FSL_IMX8MP_ECSPI2_IRQ = 32,
FSL_IMX8MP_ECSPI3_IRQ = 33,
- FSL_IMX8MP_ECSPI4_IRQ = 34,
FSL_IMX8MP_I2C1_IRQ = 35,
FSL_IMX8MP_I2C2_IRQ = 36,
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5d11d26..abd8764 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -154,7 +154,7 @@ struct CPUClass {
int (*mmu_index)(CPUState *cpu, bool ifetch);
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
- uint8_t *buf, int len, bool is_write);
+ uint8_t *buf, size_t len, bool is_write);
void (*dump_state)(CPUState *cpu, FILE *, int flags);
void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value);
int64_t (*get_arch_id)(CPUState *cpu);
diff --git a/migration/channel-block.c b/migration/channel-block.c
index fff8d87..b0477f5 100644
--- a/migration/channel-block.c
+++ b/migration/channel-block.c
@@ -123,7 +123,7 @@ qio_channel_block_seek(QIOChannel *ioc,
bioc->offset = offset;
break;
case SEEK_CUR:
- bioc->offset += whence;
+ bioc->offset += offset;
break;
case SEEK_END:
error_setg(errp, "Size of VMstate region is unknown");
diff --git a/system/physmem.c b/system/physmem.c
index e97de3e..333a5eb 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -158,6 +158,7 @@ static void io_mem_init(void);
static void memory_map_init(void);
static void tcg_log_global_after_sync(MemoryListener *listener);
static void tcg_commit(MemoryListener *listener);
+static bool ram_is_cpr_compatible(RAMBlock *rb);
/**
* CPUAddressSpace: all the information a CPU needs about an AddressSpace
@@ -1908,13 +1909,18 @@ static void ram_block_add(RAMBlock *new_block, Error **errp)
goto out_free;
}
- error_setg(&new_block->cpr_blocker,
- "Memory region %s uses guest_memfd, "
- "which is not supported with CPR.",
- memory_region_name(new_block->mr));
- migrate_add_blocker_modes(&new_block->cpr_blocker, errp,
- MIG_MODE_CPR_TRANSFER,
- -1);
+ /*
+ * Add a specific guest_memfd blocker if a generic one would not be
+ * added by ram_block_add_cpr_blocker.
+ */
+ if (ram_is_cpr_compatible(new_block)) {
+ error_setg(&new_block->cpr_blocker,
+ "Memory region %s uses guest_memfd, "
+ "which is not supported with CPR.",
+ memory_region_name(new_block->mr));
+ migrate_add_blocker_modes(&new_block->cpr_blocker, errp,
+ MIG_MODE_CPR_TRANSFER, -1);
+ }
}
ram_size = (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS;
diff --git a/target/avr/disas.c b/target/avr/disas.c
index b7689e8d..d341030 100644
--- a/target/avr/disas.c
+++ b/target/avr/disas.c
@@ -68,28 +68,35 @@ static bool decode_insn(DisasContext *ctx, uint16_t insn);
int avr_print_insn(bfd_vma addr, disassemble_info *info)
{
- DisasContext ctx;
+ DisasContext ctx = { info };
DisasContext *pctx = &ctx;
bfd_byte buffer[4];
uint16_t insn;
int status;
- ctx.info = info;
-
- status = info->read_memory_func(addr, buffer, 4, info);
+ status = info->read_memory_func(addr, buffer, 2, info);
if (status != 0) {
info->memory_error_func(status, addr, info);
return -1;
}
insn = bfd_getl16(buffer);
- ctx.next_word = bfd_getl16(buffer + 2);
- ctx.next_word_used = false;
+
+ status = info->read_memory_func(addr + 2, buffer + 2, 2, info);
+ if (status == 0) {
+ ctx.next_word = bfd_getl16(buffer + 2);
+ }
if (!decode_insn(&ctx, insn)) {
output(".db", "0x%02x, 0x%02x", buffer[0], buffer[1]);
}
- return ctx.next_word_used ? 4 : 2;
+ if (!ctx.next_word_used) {
+ return 2;
+ } else if (status == 0) {
+ return 4;
+ }
+ info->memory_error_func(status, addr + 2, info);
+ return -1;
}
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 7be4a1d..8b36642 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -391,6 +391,4 @@ void hppa_cpu_alarm_timer(void *);
#endif
G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra);
-#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
-
#endif /* HPPA_CPU_H */
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index eae874c..254e4fb 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -426,6 +426,7 @@ struct ArchCPU {
const char *dtb_compatible;
/* used by KVM_REG_LOONGARCH_COUNTER ioctl to access guest time counters */
uint64_t kvm_state_counter;
+ VMChangeStateEntry *vmsentry;
};
/**
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index 7f63e7c..f0e3cfe 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -1080,8 +1080,10 @@ int kvm_arch_init_vcpu(CPUState *cs)
uint64_t val;
int ret;
Error *local_err = NULL;
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
- qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);
+ cpu->vmsentry = qemu_add_vm_change_state_handler(
+ kvm_loongarch_vm_stage_change, cs);
if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {
brk_insn = val;
@@ -1197,6 +1199,9 @@ void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
int kvm_arch_destroy_vcpu(CPUState *cs)
{
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+
+ qemu_del_vm_change_state_handler(cpu->vmsentry);
return 0;
}
diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h
index 11b3ac0..8fcb1b4 100644
--- a/target/mips/cpu-param.h
+++ b/target/mips/cpu-param.h
@@ -18,12 +18,7 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#endif
-#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
-#else
-#define TARGET_PAGE_BITS_VARY
-#define TARGET_PAGE_BITS_MIN 12
-#endif
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c
index 01a07a1..78e422b 100644
--- a/target/mips/tcg/system/cp0_helper.c
+++ b/target/mips/tcg/system/cp0_helper.c
@@ -864,36 +864,24 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, target_ulong arg1)
}
}
-void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask)
+uint32_t compute_pagemask(uint32_t val)
{
- uint32_t mask;
- int maskbits;
-
/* Don't care MASKX as we don't support 1KB page */
- mask = extract32((uint32_t)arg1, CP0PM_MASK, 16);
- maskbits = cto32(mask);
+ uint32_t mask = extract32(val, CP0PM_MASK, 16);
+ int maskbits = cto32(mask);
- /* Ensure no more set bit after first zero */
- if ((mask >> maskbits) != 0) {
- goto invalid;
- }
- /* We don't support VTLB entry smaller than target page */
- if ((maskbits + TARGET_PAGE_BITS_MIN) < TARGET_PAGE_BITS) {
- goto invalid;
+ /* Ensure no more set bit after first zero, and maskbits even. */
+ if ((mask >> maskbits) == 0 && maskbits % 2 == 0) {
+ return mask << CP0PM_MASK;
+ } else {
+ /* When invalid, set to default target page size. */
+ return 0;
}
- env->CP0_PageMask = mask << CP0PM_MASK;
-
- return;
-
-invalid:
- /* When invalid, set to default target page size. */
- mask = (~TARGET_PAGE_MASK >> TARGET_PAGE_BITS_MIN);
- env->CP0_PageMask = mask << CP0PM_MASK;
}
void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1)
{
- update_pagemask(env, arg1, &env->CP0_PageMask);
+ env->CP0_PageMask = compute_pagemask(arg1);
}
void helper_mtc0_pagegrain(CPUMIPSState *env, target_ulong arg1)
diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c
index ca4d6b2..df80301 100644
--- a/target/mips/tcg/system/tlb_helper.c
+++ b/target/mips/tcg/system/tlb_helper.c
@@ -875,8 +875,8 @@ refill:
break;
}
}
- pw_pagemask = m >> TARGET_PAGE_BITS_MIN;
- update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask);
+ pw_pagemask = m >> TARGET_PAGE_BITS;
+ pw_pagemask = compute_pagemask(pw_pagemask << CP0PM_MASK);
pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF);
{
target_ulong tmp_entryhi = env->CP0_EntryHi;
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index 74fc130..950e6af 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -47,7 +47,7 @@ bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
void mmu_init(CPUMIPSState *env, const mips_def_t *def);
-void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
+uint32_t compute_pagemask(uint32_t val);
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
uint32_t cpu_mips_get_random(CPUMIPSState *env);
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index d731426..1f75629 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -377,7 +377,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
resettable_class_set_parent_phases(rc, NULL, s390_cpu_reset_hold, NULL,
&scc->parent_phases);
- cc->class_by_name = s390_cpu_class_by_name,
+ cc->class_by_name = s390_cpu_class_by_name;
cc->mmu_index = s390x_cpu_mmu_index;
cc->dump_state = s390_cpu_dump_state;
cc->query_cpu_fast = s390_query_cpu_fast;
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 462bcb6..68f8c21 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -604,7 +604,7 @@ void dump_mmu(CPUSPARCState *env);
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
- uint8_t *buf, int len, bool is_write);
+ uint8_t *buf, size_t len, bool is_write);
#endif
/* translate.c */
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index b559afc..45882e2 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -600,6 +600,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
case 0x0C: /* Leon3 Date Cache config */
if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
ret = leon3_cache_control_ld(env, addr, size);
+ } else {
+ qemu_log_mask(LOG_UNIMP, "0x" TARGET_FMT_lx ": unimplemented"
+ " address, size: %d\n", addr, size);
}
break;
case 0x01c00a00: /* MXCC control register */
@@ -816,6 +819,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
case 0x0C: /* Leon3 Date Cache config */
if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
leon3_cache_control_st(env, addr, val, size);
+ } else {
+ qemu_log_mask(LOG_UNIMP, "0x" TARGET_FMT_lx ": unimplemented"
+ " address, size: %d\n", addr, size);
}
break;
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 7548d01..3821cd9 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -389,7 +389,7 @@ void dump_mmu(CPUSPARCState *env)
* that the sparc ABI is followed.
*/
int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
- uint8_t *buf, int len, bool is_write)
+ uint8_t *buf, size_t len, bool is_write)
{
CPUSPARCState *env = cpu_env(cs);
target_ulong addr = address;
diff --git a/tcg/tcg.c b/tcg/tcg.c
index e8950df..dfd48b8 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -4671,6 +4671,9 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
ts->mem_coherent = 0;
break;
case TEMP_VAL_MEM:
+ if (!ts->mem_allocated) {
+ temp_allocate_frame(s, ts);
+ }
reg = tcg_reg_alloc(s, desired_regs, allocated_regs,
preferred_regs, ts->indirect_base);
tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
diff --git a/tests/functional/meson.build b/tests/functional/meson.build
index 96d2828..0f8be30 100644
--- a/tests/functional/meson.build
+++ b/tests/functional/meson.build
@@ -26,7 +26,7 @@ test_timeouts = {
'arm_aspeed_witherspoon' : 120,
'arm_aspeed_ast2500' : 720,
'arm_aspeed_ast2600' : 1200,
- 'arm_aspeed_bletchley' : 120,
+ 'arm_aspeed_bletchley' : 480,
'arm_aspeed_rainier' : 480,
'arm_bpim2u' : 500,
'arm_collie' : 180,
diff --git a/tests/functional/qemu_test/__init__.py b/tests/functional/qemu_test/__init__.py
index 45f7bef..af41c2c 100644
--- a/tests/functional/qemu_test/__init__.py
+++ b/tests/functional/qemu_test/__init__.py
@@ -15,6 +15,6 @@ from .testcase import QemuBaseTest, QemuUserTest, QemuSystemTest
from .linuxkernel import LinuxKernelTest
from .decorators import skipIfMissingCommands, skipIfNotMachine, \
skipFlakyTest, skipUntrustedTest, skipBigDataTest, skipSlowTest, \
- skipIfMissingImports
+ skipIfMissingImports, skipIfOperatingSystem
from .archive import archive_extract
from .uncompress import uncompress
diff --git a/tests/functional/qemu_test/decorators.py b/tests/functional/qemu_test/decorators.py
index 1651eb7..50d29de 100644
--- a/tests/functional/qemu_test/decorators.py
+++ b/tests/functional/qemu_test/decorators.py
@@ -5,7 +5,7 @@
import importlib
import os
import platform
-from unittest import skipUnless
+from unittest import skipIf, skipUnless
from .cmd import which
@@ -28,6 +28,19 @@ def skipIfMissingCommands(*args):
'''
Decorator to skip execution of a test if the current
+host operating system does match one of the prohibited
+ones.
+Example
+
+ @skipIfOperatingSystem("Linux", "Darwin")
+'''
+def skipIfOperatingSystem(*args):
+ return skipIf(platform.system() in args,
+ 'running on an OS (%s) that is not able to run this test' %
+ ", ".join(args))
+
+'''
+Decorator to skip execution of a test if the current
host machine does not match one of the permitted
machines.
Example
diff --git a/tests/functional/test_aarch64_replay.py b/tests/functional/test_aarch64_replay.py
index 04cde43..029fef3 100755
--- a/tests/functional/test_aarch64_replay.py
+++ b/tests/functional/test_aarch64_replay.py
@@ -5,7 +5,7 @@
#
# SPDX-License-Identifier: GPL-2.0-or-later
-from qemu_test import Asset
+from qemu_test import Asset, skipIfOperatingSystem
from replay_kernel import ReplayKernelBase
@@ -16,6 +16,8 @@ class Aarch64Replay(ReplayKernelBase):
'releases/29/Everything/aarch64/os/images/pxeboot/vmlinuz'),
'7e1430b81c26bdd0da025eeb8fbd77b5dc961da4364af26e771bd39f379cbbf7')
+ # Failing on Darwin: https://gitlab.com/qemu-project/qemu/-/issues/2907
+ @skipIfOperatingSystem('Darwin')
def test_aarch64_virt(self):
self.set_machine('virt')
self.cpu = 'cortex-a53'
diff --git a/tests/functional/test_aarch64_rme_sbsaref.py b/tests/functional/test_aarch64_rme_sbsaref.py
index ddcc949..0f4f610 100755
--- a/tests/functional/test_aarch64_rme_sbsaref.py
+++ b/tests/functional/test_aarch64_rme_sbsaref.py
@@ -33,6 +33,7 @@ class Aarch64RMESbsaRefMachine(QemuSystemTest):
def test_aarch64_rme_sbsaref(self):
self.set_machine('sbsa-ref')
self.require_accelerator('tcg')
+ self.require_netdev('user')
self.vm.set_console()
diff --git a/tests/functional/test_aarch64_rme_virt.py b/tests/functional/test_aarch64_rme_virt.py
index 38e0172..a1abf58 100755
--- a/tests/functional/test_aarch64_rme_virt.py
+++ b/tests/functional/test_aarch64_rme_virt.py
@@ -60,8 +60,10 @@ class Aarch64RMEVirtMachine(QemuSystemTest):
# and launching a nested VM using it.
def test_aarch64_rme_virt(self):
self.set_machine('virt')
- self.vm.set_console()
self.require_accelerator('tcg')
+ self.require_netdev('user')
+
+ self.vm.set_console()
stack_path_tar_gz = self.ASSET_RME_STACK_VIRT.fetch()
self.archive_extract(stack_path_tar_gz, format="tar")
@@ -85,7 +87,9 @@ class Aarch64RMEVirtMachine(QemuSystemTest):
self.vm.add_args('-fsdev', f'local,security_model=none,path={rme_stack},id=shr0')
self.vm.add_args('-device', 'virtio-net-pci,netdev=net0')
self.vm.add_args('-netdev', 'user,id=net0')
- self.vm.add_args('-append', 'root=/dev/vda')
+ # We need to add nokaslr to avoid triggering this sporadic bug:
+ # https://gitlab.com/qemu-project/qemu/-/issues/2823
+ self.vm.add_args('-append', 'root=/dev/vda nokaslr')
self.vm.launch()
# Wait for host VM boot to complete.
diff --git a/tests/functional/test_aarch64_virt_gpu.py b/tests/functional/test_aarch64_virt_gpu.py
index 314d994..3844727 100755
--- a/tests/functional/test_aarch64_virt_gpu.py
+++ b/tests/functional/test_aarch64_virt_gpu.py
@@ -74,6 +74,8 @@ class Aarch64VirtGPUMachine(LinuxKernelTest):
self.skipTest("Can't access host DRM render node")
elif "'type' does not accept value 'egl-headless'" in excp.output:
self.skipTest("egl-headless support is not available")
+ elif "'type' does not accept value 'dbus'" in excp.output:
+ self.skipTest("dbus display support is not available")
else:
self.log.info("unhandled launch failure: %s", excp.output)
raise excp
diff --git a/tests/functional/test_arm_bpim2u.py b/tests/functional/test_arm_bpim2u.py
index 12cd359..8de6ccb 100755
--- a/tests/functional/test_arm_bpim2u.py
+++ b/tests/functional/test_arm_bpim2u.py
@@ -140,6 +140,8 @@ class BananaPiMachine(LinuxKernelTest):
@skipBigDataTest()
def test_arm_bpim2u_openwrt_22_03_3(self):
self.set_machine('bpim2u')
+ self.require_netdev('user')
+
# This test download a 8.9 MiB compressed image and expand it
# to 127 MiB.
image_path = self.uncompress(self.ASSET_SD_IMAGE)
diff --git a/tests/functional/test_arm_cubieboard.py b/tests/functional/test_arm_cubieboard.py
index 423db71..b87a281 100755
--- a/tests/functional/test_arm_cubieboard.py
+++ b/tests/functional/test_arm_cubieboard.py
@@ -107,6 +107,8 @@ class CubieboardMachine(LinuxKernelTest):
# This test download a 7.5 MiB compressed image and expand it
# to 126 MiB.
self.set_machine('cubieboard')
+ self.require_netdev('user')
+
image_path = self.uncompress(self.ASSET_OPENWRT)
image_pow2ceil_expand(image_path)
diff --git a/tests/functional/test_arm_orangepi.py b/tests/functional/test_arm_orangepi.py
index 2891939..1815f56 100755
--- a/tests/functional/test_arm_orangepi.py
+++ b/tests/functional/test_arm_orangepi.py
@@ -147,6 +147,8 @@ class OrangePiMachine(LinuxKernelTest):
@skipBigDataTest()
def test_arm_orangepi_armbian(self):
self.set_machine('orangepi-pc')
+ self.require_netdev('user')
+
# This test download a 275 MiB compressed image and expand it
# to 1036 MiB, but the underlying filesystem is 1552 MiB...
# As we expand it to 2 GiB we are safe.
@@ -181,6 +183,8 @@ class OrangePiMachine(LinuxKernelTest):
@skipBigDataTest()
def test_arm_orangepi_uboot_netbsd9(self):
self.set_machine('orangepi-pc')
+ self.require_netdev('user')
+
# This test download a 304MB compressed image and expand it to 2GB
# We use the common OrangePi PC 'plus' build of U-Boot for our secondary
# program loader (SPL). We will then set the path to the more specific
diff --git a/tests/functional/test_ppc64_hv.py b/tests/functional/test_ppc64_hv.py
index 62f996a..1920e91 100755
--- a/tests/functional/test_ppc64_hv.py
+++ b/tests/functional/test_ppc64_hv.py
@@ -125,6 +125,7 @@ class HypervisorTest(QemuSystemTest):
def test_hv_pseries(self):
self.require_accelerator("tcg")
+ self.require_netdev('user')
self.set_machine('pseries')
self.vm.add_args("-accel", "tcg,thread=multi")
self.vm.add_args('-device', 'nvme,serial=1234,drive=drive0')
@@ -136,6 +137,7 @@ class HypervisorTest(QemuSystemTest):
def test_hv_pseries_kvm(self):
self.require_accelerator("kvm")
+ self.require_netdev('user')
self.set_machine('pseries')
self.vm.add_args("-accel", "kvm")
self.vm.add_args('-device', 'nvme,serial=1234,drive=drive0')
@@ -147,6 +149,7 @@ class HypervisorTest(QemuSystemTest):
def test_hv_powernv(self):
self.require_accelerator("tcg")
+ self.require_netdev('user')
self.set_machine('powernv')
self.vm.add_args("-accel", "tcg,thread=multi")
self.vm.add_args('-device', 'nvme,bus=pcie.2,addr=0x0,serial=1234,drive=drive0',
diff --git a/tests/functional/test_ppc64_replay.py b/tests/functional/test_ppc64_replay.py
index 48ce1b7..e8c9c4b 100755
--- a/tests/functional/test_ppc64_replay.py
+++ b/tests/functional/test_ppc64_replay.py
@@ -5,7 +5,7 @@
#
# SPDX-License-Identifier: GPL-2.0-or-later
-from qemu_test import Asset
+from qemu_test import Asset, skipFlakyTest
from replay_kernel import ReplayKernelBase
@@ -16,6 +16,7 @@ class Ppc64Replay(ReplayKernelBase):
'day19.tar.xz'),
'20b1bb5a8488c664defbb5d283addc91a05335a936c63b3f5ff7eee74b725755')
+ @skipFlakyTest('https://gitlab.com/qemu-project/qemu/-/issues/2523')
def test_ppc64_e500(self):
self.set_machine('ppce500')
self.cpu = 'e5500'
diff --git a/tests/functional/test_vnc.py b/tests/functional/test_vnc.py
index 1916be0..8c9953b 100755
--- a/tests/functional/test_vnc.py
+++ b/tests/functional/test_vnc.py
@@ -12,6 +12,7 @@
import socket
from typing import List
+from qemu.machine.machine import VMLaunchFailure
from qemu_test import QemuSystemTest
from qemu_test.ports import Ports
@@ -32,7 +33,14 @@ class Vnc(QemuSystemTest):
def test_no_vnc_change_password(self):
self.vm.add_args('-nodefaults', '-S')
self.vm.launch()
- self.assertFalse(self.vm.qmp('query-vnc')['return']['enabled'])
+
+ query_vnc_response = self.vm.qmp('query-vnc')
+ if 'error' in query_vnc_response:
+ self.assertEqual(query_vnc_response['error']['class'],
+ 'CommandNotFound')
+ self.skipTest('VNC support not available')
+ self.assertFalse(query_vnc_response['return']['enabled'])
+
set_password_response = self.vm.qmp('change-vnc-password',
password='new_password')
self.assertIn('error', set_password_response)
@@ -41,9 +49,19 @@ class Vnc(QemuSystemTest):
self.assertEqual(set_password_response['error']['desc'],
'Could not set password')
+ def launch_guarded(self):
+ try:
+ self.vm.launch()
+ except VMLaunchFailure as excp:
+ if "-vnc: invalid option" in excp.output:
+ self.skipTest("VNC support not available")
+ else:
+ self.log.info("unhandled launch failure: %s", excp.output)
+ raise excp
+
def test_change_password_requires_a_password(self):
self.vm.add_args('-nodefaults', '-S', '-vnc', ':1,to=999')
- self.vm.launch()
+ self.launch_guarded()
self.assertTrue(self.vm.qmp('query-vnc')['return']['enabled'])
set_password_response = self.vm.qmp('change-vnc-password',
password='new_password')
@@ -55,7 +73,7 @@ class Vnc(QemuSystemTest):
def test_change_password(self):
self.vm.add_args('-nodefaults', '-S', '-vnc', ':1,to=999,password=on')
- self.vm.launch()
+ self.launch_guarded()
self.assertTrue(self.vm.qmp('query-vnc')['return']['enabled'])
self.vm.cmd('change-vnc-password',
password='new_password')
@@ -66,7 +84,7 @@ class Vnc(QemuSystemTest):
self.assertFalse(check_connect(c))
self.vm.add_args('-nodefaults', '-S', '-vnc', f'{VNC_ADDR}:{a - 5900}')
- self.vm.launch()
+ self.launch_guarded()
self.assertEqual(self.vm.qmp('query-vnc')['return']['service'], str(a))
self.assertTrue(check_connect(a))
self.assertFalse(check_connect(b))
diff --git a/tests/functional/test_x86_64_kvm_xen.py b/tests/functional/test_x86_64_kvm_xen.py
index 3bedef6..c6abf6b 100755
--- a/tests/functional/test_x86_64_kvm_xen.py
+++ b/tests/functional/test_x86_64_kvm_xen.py
@@ -41,6 +41,7 @@ class KVMXenGuest(QemuSystemTest):
def common_vm_setup(self):
# We also catch lack of KVM_XEN support if we fail to launch
self.require_accelerator("kvm")
+ self.require_netdev('user')
self.vm.set_console()
diff --git a/tests/qemu-iotests/162 b/tests/qemu-iotests/162
index 956c2c5..94dae60 100755
--- a/tests/qemu-iotests/162
+++ b/tests/qemu-iotests/162
@@ -65,7 +65,6 @@ done
$QEMU_IMG info "json:{'driver': 'nbd', 'host': 'localhost', 'port': $port}" \
| grep '^image' | sed -e "s/$port/PORT/"
-_stop_nbd_server
# This is a test for NBD's bdrv_refresh_filename() implementation: It expects
# either host or path to be set, but it must not assume that they are set to
diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c
index 2750067..fad307d 100644
--- a/tests/qtest/libqtest.c
+++ b/tests/qtest/libqtest.c
@@ -1788,6 +1788,7 @@ void qtest_cb_for_every_machine(void (*cb)(const char *machine),
if (!strncmp("xenfv", machines[i].name, 5) ||
g_str_equal("xenpv", machines[i].name) ||
g_str_equal("xenpvh", machines[i].name) ||
+ g_str_equal("vmapple", machines[i].name) ||
g_str_equal("nitro-enclave", machines[i].name)) {
continue;
}