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| author | Nicholas Piggin <npiggin@gmail.com> | 2024-12-09 23:16:35 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-11 22:43:30 +1000 |
| commit | f24ff35af9b242163ac0d209a70240f13fd9f163 (patch) | |
| tree | 6204e90a1d930c7c4dbffd49ca3efb46de0e061e /scripts/tracetool/backend/syslog.py | |
| parent | 6b56bb6dbce5cfa185c34c0519ab8015f30699f7 (diff) | |
| download | qemu-f24ff35af9b242163ac0d209a70240f13fd9f163.zip qemu-f24ff35af9b242163ac0d209a70240f13fd9f163.tar.gz qemu-f24ff35af9b242163ac0d209a70240f13fd9f163.tar.bz2 | |
ppc/pnv/homer: Fix OCC registers
The HOMER OCC registers seem to have bitrotted and fail for various
reasons on powernv8, 9, and 10.
The major problems are that POWER8 has the wrong version value and its
pstate ordering is incorrect. POWER9/10 have not set the OCC state to
active. Non-zero chips are also set to OCC slaves for POWER9/10.
Unfortunately skiboot has also bitrotted and requires fixes that are
not yet in the bios files to run. With a patched skiboot, before this
change, powernv9/10 report:
[ 0.262050394,3] OCC: Chip: 0: OCC not active
[ 0.262128603,3] OCC: Initialization on all chips did not complete(timed out)
powernv8 reports:
[ 0.173572100,3] OCC: Unknown OCC-OPAL interface version.
[ 0.173812059,3] OCC: Initialization on all chips did not complete(timed out)
After this patch, all report:
[ 0.176815668,5] OCC: All Chip Rdy after 0 ms
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'scripts/tracetool/backend/syslog.py')
0 files changed, 0 insertions, 0 deletions