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author | Nicholas Piggin <npiggin@gmail.com> | 2024-12-19 13:40:35 +1000 |
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committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-11 22:43:32 +1000 |
commit | d8a624515a9773cb9d7afd47926bd64ae8fa0fc6 (patch) | |
tree | e27039aa23d07a702ccb504b91285cec21fbbf18 /scripts/rust/rustc_args.py | |
parent | e8291ec16da80566c121c68d9112be458954d90b (diff) | |
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target/ppc: Wire up BookE ATB registers for e500 family
From the Freescale PowerPC Architecture Primer:
Alternate time base APU. This APU, implemented on the e500v2, defines
a 64-bit time base counter that differs from the PowerPC defined time
base in that it is not writable and counts at a different, and
typically much higher, frequency. The alternate time base always
counts up, wrapping when the 64-bit count overflows.
This implementation of ATB uses the same frequency as the TB. The
existing spr_read_atbu/l functions are unused without this patch
to wire them into the SPR.
RTEMS uses this SPR on the e6500, though this hasn't been tested.
Message-ID: <20241219034035.1826173-6-npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'scripts/rust/rustc_args.py')
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