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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-01-02 01:27:18 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-01-11 08:47:45 +1100 |
| commit | ca5bed07d0e7e0530c2cafbc134c4f74e582ac50 (patch) | |
| tree | cacf18f0e6dde8857ad24dc6c2a68dc72a4ded98 /scripts/qapi/parser.py | |
| parent | afa37be4b4b0cd36150db7d62ab68f2673f7589a (diff) | |
| download | qemu-ca5bed07d0e7e0530c2cafbc134c4f74e582ac50.zip qemu-ca5bed07d0e7e0530c2cafbc134c4f74e582ac50.tar.gz qemu-ca5bed07d0e7e0530c2cafbc134c4f74e582ac50.tar.bz2 | |
tcg/ppc: Use new registers for LQ destination
LQ has a constraint that RTp != RA, else SIGILL.
Therefore, force the destination of INDEX_op_qemu_*_ld128 to be a
new register pair, so that it cannot overlap the input address.
This requires new support in process_op_defs and tcg_reg_alloc_op.
Cc: qemu-stable@nongnu.org
Fixes: 526cd4ec01f ("tcg/ppc: Support 128-bit load/store")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240102013456.131846-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'scripts/qapi/parser.py')
0 files changed, 0 insertions, 0 deletions