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author | Peter Maydell <peter.maydell@linaro.org> | 2024-02-06 13:29:23 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-15 14:32:38 +0000 |
commit | a72e625078d4766367510887552f8c2f49bd7039 (patch) | |
tree | c02f9da63a55e5c6b87edefca97006481b3d9c35 /scripts/qapi/parser.py | |
parent | f2b4a98930c122648e9dc494e49cea5dffbcc2be (diff) | |
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hw/misc/mps2-scc: Fix condition for CFG3 register
We currently guard the CFG3 register read with
(scc_partno(s) == 0x524 && scc_partno(s) == 0x547)
which is clearly wrong as it is never true.
This register is present on all board types except AN524
and AN527; correct the condition.
Fixes: 6ac80818941829c0 ("hw/misc/mps2-scc: Implement changes for AN547")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240206132931.38376-6-peter.maydell@linaro.org
Diffstat (limited to 'scripts/qapi/parser.py')
0 files changed, 0 insertions, 0 deletions