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| author | Ed Tanous <etanous@nvidia.com> | 2025-07-03 07:42:46 -0700 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-03 17:36:45 +0200 |
| commit | 92096685a00414a813aa4735db1706e4e5c6917d (patch) | |
| tree | 12c4efc0e31ad62769d318b4324f715bdb78a4a7 /rust/qemu-api-macros/src | |
| parent | 6888a4a9c8601005a2329fee6487c3c0df1348c0 (diff) | |
| download | qemu-92096685a00414a813aa4735db1706e4e5c6917d.zip qemu-92096685a00414a813aa4735db1706e4e5c6917d.tar.gz qemu-92096685a00414a813aa4735db1706e4e5c6917d.tar.bz2 | |
hw/arm/aspeed: Add second SPI chip to Aspeed model
Aspeed2600 has two spi lanes; Add a new struct that can mount the
second SPI.
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250703144249.3348879-2-etanous@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'rust/qemu-api-macros/src')
0 files changed, 0 insertions, 0 deletions