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author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2025-06-23 11:53:06 -0300 |
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committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-07-04 12:17:52 +0200 |
commit | 0fd1d74080215571f2c8e2b85bfefb3c65238cfe (patch) | |
tree | d26a335d2cdf30dbff562ae98c6e531cf90bc99e /rust/qemu-api-macros/src/utils.rs | |
parent | 842e7eecd4446957c5edf0c65e5e41fadea2f015 (diff) | |
download | qemu-0fd1d74080215571f2c8e2b85bfefb3c65238cfe.zip qemu-0fd1d74080215571f2c8e2b85bfefb3c65238cfe.tar.gz qemu-0fd1d74080215571f2c8e2b85bfefb3c65238cfe.tar.bz2 |
monitor/hmp-cmds-target: add CPU_DUMP_VPU in hmp_info_registers()
Commit b84694defb added the CPU_DUMP_VPU to allow vector registers to be
logged by log_cpu_exec() in TCG. This flag was then used in commit
b227f6a8a7 to print RISC-V vector registers using this flag. Note that
this change was done in riscv_cpu_dump_state(), the cpu_dump_state()
callback for RISC-V, the same callback used in hmp_info_registers().
Back then we forgot to change hmp_info_registers(), and 'info registers'
isn't showing RISC-V vector registers as a result. No other target is
impacted since only RISC-V is using CPU_DUMP_VPU.
There's no reason to not show VPU regs in info_registers(), so add
CPU_DUMP_VPU to hmp_info_registers(). This will print vector registers
for all RISC-V machines and, as said above, has no impact in other
archs.
Cc: Dr. David Alan Gilbert <dave@treblig.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250623145306.991562-1-dbarboza@ventanamicro.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'rust/qemu-api-macros/src/utils.rs')
0 files changed, 0 insertions, 0 deletions