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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-05-02 21:18:45 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-02 21:18:45 +0100 |
| commit | 4ebc33f3f3b656ebf62112daca6aa0f8019b4891 (patch) | |
| tree | d1aa3082a2b2e1fbcdac6446643974e8a2ec0e1e /qga/commands-posix.c | |
| parent | c586691e676214eb7edf6a468e84e7ce3b314d43 (diff) | |
| parent | 129f1f9ee7df77d367d961b3c25353612d33cd83 (diff) | |
| download | qemu-4ebc33f3f3b656ebf62112daca6aa0f8019b4891.zip qemu-4ebc33f3f3b656ebf62112daca6aa0f8019b4891.tar.gz qemu-4ebc33f3f3b656ebf62112daca6aa0f8019b4891.tar.bz2 | |
Merge tag 'pull-tcg-20230502-2' of https://gitlab.com/rth7680/qemu into staging
Misc tcg-related patch queue.
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* tag 'pull-tcg-20230502-2' of https://gitlab.com/rth7680/qemu:
tcg: Introduce tcg_out_movext2
tcg/mips: Conditionalize tcg_out_exts_i32_i64
tcg/loongarch64: Conditionalize tcg_out_exts_i32_i64
accel/tcg: Add cpu_ld*_code_mmu
migration/xbzrle: Use __attribute__((target)) for avx512
qemu/int128: Re-shuffle Int128Alias members
tcg: Add tcg_gen_gvec_rotrs
tcg: Add tcg_gen_gvec_andcs
qemu/host-utils.h: Add clz and ctz functions for lower-bit integers
qemu/bitops.h: Limit rotate amounts
accel/tcg: Uncache the host address for instruction fetch when tlb size < 1
softmmu: Tidy dirtylimit_dirty_ring_full_time
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'qga/commands-posix.c')
0 files changed, 0 insertions, 0 deletions